32k oscillator output to pin?

Hardware Arduino Zero
1

I can choose xosc32k to drive a gclk then hook up a tc or tcc to that gclk. I can even output the interrupt to a given pin.

How do I output a clock frequency to a given pin instead of the interrupt?

Looking to output 32.768kHz to use as refclock for another ic. Or am I off my nut?

2

Have you seen this link ?

3

If you look at table 6.1 titled "PORT Function Multiplexing" in the SAMD21 datasheet, you'll see that peripheral H allows you to select the generic clock as IO (input/output).

For example GCLK_IO[4] is the IO for generic clock 4. On the Zero this corresponds to the SAMD21's port pin PA20, which on the Arduino Zero is digital pin 6. If you require another pin then it's necessary to connect the XOSC32K signal to another generic clock. GCLKs 4 through to 7 are free to use, (as Arduino core code doesn't use them).

So to connect the GCLK4 to digital pin 6 you must set-up GCLK4 and enable the output enable (OE) bit in the Generic Clock Generator Control (GENCTRL) register:

REG_GCLK_GENCTRL = GCLK_GENCTRL_OE |            // Enable the GCLK output
                   GCLK_GENCTRL_IDC |           // Set the duty cycle to 50/50 HIGH/LOW
                   GCLK_GENCTRL_GENEN |         // Enable GCLK 4
                   GCLK_GENCTRL_SRC_XOSC32K |   // Set the clock source to the external 32.768kHz 
                   GCLK_GENCTRL_ID(4);          // Set clock source on GCLK 4
while (GCLK->STATUS.bit.SYNCBUSY);              // Wait for synchronization

...then connect to perhiperal H by enabling the port multiplexer on digital pin 6:

PORT->Group[g_APinDescription[6].ulPort].PINCFG[g_APinDescription[6].ulPin].bit.PMUXEN = 1;

...following that, connect the multiplexer to peripheral H (GCLK_IO[4]):

PORT->Group[g_APinDescription[6].ulPort].PMUX[g_APinDescription[6].ulPin >> 1].reg |= PORT_PMUX_PMUXE_H;

Note that the SAMD21's multiplexer registers are arranged as odd and even pairs. There are 16 multiplexer registers for the 32 port pins on Port A. Digital pin 6 is port pin PA20, which is even, while digital pin 7 is PA21, which is odd. The >> 1 is essentially divide by 2, so we're essentially addressing multiplexer register 10 (PA20/2) for the PA20 and PA21 pair.

The 32.768kHz signal will now be output on D6.

Here's the code in its entirety:

// Setup GCLK 4 at 32.768kHz on digtial pin 6
void setup() 
{   
  REG_GCLK_GENCTRL = GCLK_GENCTRL_OE |            // Enable the GCLK output
                     GCLK_GENCTRL_IDC |           // Set the duty cycle to 50/50 HIGH/LOW
                     GCLK_GENCTRL_GENEN |         // Enable GCLK 4
                     GCLK_GENCTRL_SRC_XOSC32K |   // Set the clock source to the external 32.768kHz 
                     GCLK_GENCTRL_ID(4);          // Set clock source on GCLK 4
  while (GCLK->STATUS.bit.SYNCBUSY);              // Wait for synchronization
  
  // Enable the port multiplexer on digital pin 6
  PORT->Group[g_APinDescription[6].ulPort].PINCFG[g_APinDescription[6].ulPin].bit.PMUXEN = 1;

  // Switch the port multiplexer to peripheral H (GCLK_IO[4])
  PORT->Group[g_APinDescription[6].ulPort].PMUX[g_APinDescription[6].ulPin >> 1].reg |= PORT_PMUX_PMUXE_H;
}

void loop() {}
4

thank you both very much.

5

i find it interesting that it outputs a clock signal on the pin without the pin being set to output. my si47xx chips still tune, though!

GEN04:  XOSC32K IDC OE

PA20 D6:  IN PMUX=GCLK:4 INEN