7400 (NAND Gate)

Hi everyone, just a quick question. I'm looking at using a 7400 nand gate for some arduino outputs and just wanted to know about current draw. I've read in a few places that the gate uses less current if outputs are set high? Does that mean I should tie any unused gates (there are 4 dual inputs in the 7400 chip) together and tie to vcc to use less current?

Thanks

Tying both inputs of a NAND high will in fact make the output go LOW.

I hadn't heard about this difference in supply current that you mention.

The 7400 series is old TTL logic (normally high). Replaced by the low power Cmos HC family (74HC00). Leo..

Alexisa: I've read in a few places that the gate uses less current if outputs are set high?

I'll speculate. I think what you're seeing is the current *capability * for each state. TTL is made for driving active low inputs so there's more oomph when the output is low.

totem pole output

Alexisa: I'm looking at using a 7400 nand gate

Why are you using the old TTL version, is their a specific reason for it ?

There are far better and more modern versions of the 7400 which use a fraction of the power of the original.

It is unused inputs that must be connected to either the power or ground but not to minimise current but to prevent oscillation in the chip.

Which you use depends on what you are doing with the gates. Unused outputs should be left unconnected.

If you are using the gates just as buffers connect both inputs to the same Arduino pin.

Best practice with TTL is tie unused inputs to ground for low, or via 1k resistor to +5V for high. For LS TTL, 10k pullup is used instead of 1k. Never tie a TTL input directly to +5V, they are easily damaged by supply voltage spikes if you do that.

Best of all is use CMOS 74HC family, but then all unused inputs needed to be tied to ground or +5V (but no resistors needed).