While I was writing this post I’ve received the reply from ergoen.
Thank-you, I’ll go to see your link, anyway my post is below.
Well, this is what I learned so far:
1- the VidorBitstream-release comes with a BareMinimum stuff:
If I try to compile BareMinimum.ino the only way to success is to copy the src folder
in the same BareMinimum.ino folder and to change the #include path
→ why? If this is really the only way to compile, why to distribute a wrong file structure?
So I have to copy src as /examples/BareMinimum/libraries folder and change the #include path
The Quartus project seems must be placed here:
If I try to load in Quartus the BareMinimum project the CycloneV is the selected family,
no constraint files linked and so on, so I’ve rescued my previous simple project from
2- I can see the src folder contains the .ttf file, very likely copied (to be done by hand?)
from the Quartus project folder.
3- the VidorBitstream-release has a TOOLS/scripts folder with the assemble_library.sh that should
be the script to be executed in order to have a not well defined “distribution library”.
Where to run the scripts? After several attempts, very likely in project/.
If I do that a VidorBitstream-release/distrib folder is created, here the Cygwin log translated
cp: impossible to execute stat of ‘./projects/MKRVIDOR4000_prova/build/output_files/app.ttf’: No such file or directory
cp: impossible to execute stat of ‘./projects/MKRVIDOR4000_prova/build/output_files/signature.h’: No such file or directory
My Quartus project doesn’t contain the build folder. I can copy manually the app.ttf file but
I cannot have a new signature.h file, I keep the existing one in the VidorBitstream-release.
—> If it is wrong, where to find/how to generate it?
So, what is the distrib folder content?
All seems to be a simple copy of the working folders.
4- Well, what next? I suppose I have to load all into the board.
I open the BareMinimum.ino in the distrib folder, compile and load it into Vidor4000.
There are no errors, but the simple counter bits in FPGA I’ve done are not visible on the A[6:0]
Very funny: I cannot simulate the Quartus compiled circuit because Modelsim doesn’t find
dffsa unit … still no answer from Intel.
Note that if I modify the .ino in the distrib folder there are some permission errors, so the
distrib seems for “as is/read” use only.
OK, if I don’t see the counter pins could be my error, but why I cannot find somewhere
a simple production flow from a Quartus/Verilog empty template to the final board programming?
I don’t need now IPs or Nios o whatever, I need simply to write my own Verilog code, produce
the right programming files and to program the board.
In the “Arduino stile” it should be easy and perfectly documented, isn’t it?
I’m able to do the Quartus project but following steps are not explained.
I’m still waiting for someone who has already done what I’m trying to do, so he can
explain the right flow.