Hmm, the sampling rate could be controlled from a timer firing an interrupt, and you change the timer
period programmatically to adjust the rate. There will be jitter in the interrupt timing due to the fact
different instructions take different numbers of cycles and the interrupts only happen between
instructions. But more importantly the ADC samples are constrained to be synchronous to the
analog clock on the ATmel processors, which is a divided down from the system clock (by default
its 125kHz).
I think thats really going to hamper the resolution of sampling rates, even if the analog clock is
run a lot faster.
An external SPI ADC chip might be better, and it could be 12bit or better too.