Adjusting SPI interface for unknown logic levels

It's difficult to determine which forum this should appear in, but this seems the best match.

I have an Adafruit 480x320 display, which will communicate with a Moteino Mega. Both of these devices can be powered at 5 v., but the Moteino is a 3.3 v. device tolerant of 5 v. logic, except on the SPI pins -- apparently the onboard radio, also attached to these pins, won't handle 5 v.

Now the display unit is not well documented by Adafruit. It can be powered by 3.3 or 5 v., and says it can handle 5 v. or 3.3 v. logic. What I don't know, and can't get an answer for, is whether it operates at 5 v. logic if powered by 5 v. If that were the case, bye-bye radio.

But I can accommodate the ambiguity by using a simple opamp comparator to output 3.3 v. for either a 5v. or 3.3 v. logic level. Having read up on SPI, my Moteino is the master, the display is the slave. So my question is, is the only output line from the slave the MISO line? If so, I only have one logic level that I must worry about.

I think this makes sense, but I'd appreciate a confirmation from someone who fully understands SPI.

Thanks in advance for any thoughts.

No idea what you have, any chance of a link?. Is it some sort of clone?

Comparators are open collector so they won't output anything they have open collector outputs and therefore need pull up resistors. That works both ways so use them on all pins.

It's very simple. I take a simple op amp powered at 5 v., set up a voltage divider on the neg input pin referenced to 3.0 v. Then either a 5v. or 3.3 v. input on the pos input will drive the output high, i.e., to 5 v. So the output is fed through a voltage divider to provide 3.3 v. at the divide point, which is the signal input to my Moteino chip. Could be a very short time lag, I suppose, relative to CLK.

My only question here was, is MISO the only line, of the four in an SPI interface, that sends data to the master? I believe that to be the case.

Did I miss something?

You say the display is marketed as working at 3.3v. So why not just run the display at 3.3v, so everything's at 3.3v and there's no 5v to worry about anywhere?

In any event, it is highly likely that the display runs at 5v logic levels if powered at 5v, unless you can find a regulator on the circuit board.

Because I need 5 v. on this board for one component, so I'd rather just go with 5 v. This transition between 5 v. and 3.3 v. is a PITA. About the time we're using all 3.3 v. parts, the 2 v. stuff will start to show up.

At this point, I'm going to go with 5 v., and just use level reduction on the MISO line.

What component? It looks like everything you have described so far runs on 3.3V.

Can your op-amp work at the frequencies that the SPI interface uses? While there are some that work that high they are generally not cheap.

The reason I need 5 v. is because I have a bit of an archive of 5 v. nanos left around to use up, and this circuit involves the main processor (Moteino Mega) talking to both the display and a Nano. The Nano will deal with a CC3000 WiFi board, because the CC3000, which is SPI interface, but does not operate properly when SPI is used for other communications also. That's why I isolated it out on the end of a Nano.

But at any rate, I've decided to use both a 5 v. and a 3.3 v. regulator in this system, because adding the one regulator avoids about three level-shift problems.

At any rate, thanks for the various comments.