Adjusting timing of external memory interface

Projects Programming
1

I have a Mega 2560 set up to use a parallel Address Data Bus on some old hardware. Among other things, there is an SRAM and an LCD on the bus. I can talk to the SRAM fine, and I thought I was talking to the LCD as well (commands appear to work), until I tried to write a character to it. The cursor moves, but it outputs a blank. I've since figured out that this is due to timing on the enable line of the LCD. the LCD is mapped to 0x3000 for the control register and 0x3001 for data. On the old hardware, this is done by connecting the RS pin to AD0 and the enable pin to logic that equates to
Enable = (A15')&(A14')&(A13)&(A12)&E
Where E is the E-clock, which runs in sync with the A/D bus at 1/4 the main clock frequency.

The reason my commands to the LCD worked (I think) is because address lines A15-A12 changed, creating a falling edge on the enable signal which clocked the command into the LCD. I'm not sure why this didn't happen with the data, but regardless I should be clocking it with the E line.

Is there any way to alter the way the external Address/Data bus operates to add a blip to an output to create a pulse on the E line? Writing the line low after writing to external memory won't work because the WR' line is no longer active. The only other solutions I can think of are writing my own parallel bus functions (slower, messier), or adding some hardware logic to drive the enable line based on the status of the WR and RD lines.

I've also considered driving the E signal with a PWM pin initialized as a fast mode high frequency square wave, since it should sync with the clock, but I don't know how well this would work.

suggestions?

2

So the bottom line is that your E pulse is to short, is that the case?

I'm having trouble following the setup, for example isn't there just a single "address" for an LCD, if so why the address gating. Any chance of a schematic?

You can set wait states, see section 9.4 of the 2560 data sheet.

Rob

3

Yeah it's a bit confusing, but the main reason is it's old 68HC11 based hardware. The address gating is because the LCD is on the A/D bus with a couple other devices, and there were no PCS lines. All the enables were done by ANDing the E signal with various Address combinations. The LCD is controlled by 0x3000 and 0x3001 but technically occupies 0x3000-0x3FFF and could be controlled by any odd or even address in that range.

The problem is that there's no way to pulse E during the read/write operation on the LCD, since it is all handled internally by the XMEM interface. I can either do it before, or after.

I did come up with a working solution last night, but there may be a better one.
What I did was to turn off "autopilot" and set XMCRA and XMCRB back to 0.
Then I manually set the address lines, latch the low 8 bits, set the data, set the WR/RD line, and pulse E. Once the LCD operation is done, I restored XMCRA and XMCRB and go back to XMEM.

Seems to work so far.

4

Bit of a kludge but that what has to be done sometimes.

I take it you need the XM for other things so you can't just bit-bang this all the time and leave the XM disabled.

Rob