Adventures in low power : supporting peripherals, options for powering.

So, Im moving my tinkering on again (small steps). My project is battery based and already making use of lots of power saving measures:

  • Barebones arduino 3.3v/8mhz (moving to internal osc soon to reduce component count).
  • Sleep modes being used
  • Peripheral circuits (TFT display/OP amps for signal conditioning & a few others) are switched on with a FET from a digital pin.

BUT, right now Im running the whole shebang with a discrete step up/down regulator (S7V8F3), which means Im constantly seeing a low level drain (the power source is a single 18650 rechargable @ ~3.7v)

I know I can reduce the drain by running the arduino direct from the battery, but I have a suspicion that the other components will be less tolerant of varying voltages than the atmega.

So, right now Im thinking that I power the atmega direct from the battery and the digital output that currently drives the FET can be used instead to drive the regulator (the SHDN pin), to then feed all the peripherals with 3v3.

The only issue is can see is a possible difference in logic levels (eg the SPI interface to the TFT).

Does anyone have any sage words of wisdom, or experience of doing similar?


Can you please post a copy of your circuit, in CAD or a picture of a hand drawn circuit in jpg, png or pdf?

Even if it is just in concept development.

Tom.... :)

Obviously not everything is shown, but to convey the idea:

Physical 11,12,13,14,16 are SPI connected to TFT (Sainsmart 1.8") Physical 15 is the power switch signal. Physical 19-23 (A0-A4) are all signal conditioned inputs via the op-amps (Quad lm324)

Apart from that its the usual array of decoupling caps and a piezo switch with a hardware debounce.

any feedback is welcome. Unless it concerns the way my handwriting emulates a drunken spider in an inkwell..... ;)