advice on using atmega328p analog comparator at fixed clock rate

I am using an atmega328p in a standalone application.

I have an accurate clock based on a 8MHz crystal and the AVR’s TIMER1 counter. When this timer creates an interrupt my plan is to simply read the value of ACO (bit 5 of the ACSR register). This is to happen in an infinite loop. So far it is working but I am wondering if there are any weird timing issues I should watch out for (like a synchronizer adding jitter to my clock) or if I should use a different interrupt scheme.

Any hints are appreciated


There will be a certain amount of jitter in the delay between the timer generating an interrupt and the interrupt being serviced, particularly if there are any other interrupts occurring, or if any parts of the code disable interrupts. Otherwise, it sounds fine to me.

One way to avoid jitter is to use a timer overflow to trigger ADC conversions. You need an ISR to reset the timer overflow flag, and an ISR to handle the ADC conversion complete interrupt; however the actual ADC sampling is synchronised to the timer overflow being generated with no jitter. This will only work for you if the signal you are monitoring is large enough to use the ADC instead of the comparator, and if the sampling rate is low enough for the ADC speed to keep up with it.