An old chestnut revisited - How many 595s can you daisychain ?

There are lots of posts on this over the years, but perhaps I might be the first one to actually build enough pcbs to test it ! :slight_smile:

I am building some displays, my prototype has 115 seven-segment displays ( and of course 115 x 74hc595 chips )

I have 1120 LEDs being driven , some being sourced, and some being sunk - (to avoid the current limit of the supply pins of the 595 ) - but I needn't have bothered, it is so bright that I have had to cut back the brightness with pwm on the blank pin.

I obviously will add some buffers to the data, clock, blank, and latch data lines, but to test it I have hooked it up directly to a pro-mini, ( sweet and sour ) , module and it works as is !

All data and clock lines are paralleled to the 115 chips , but the 3 latch lines are separate pins on the Arduino .

There is a bit of occasion flicker on the last board which, I am embarrassed to say was cleared with that damn 1nF cap on the end of the latch line for each row ! ( I am using Shiftout to run it slowly with all the capacitance on the boards )

I know Crossroads prefers faster SPI to Shiftout , but his scoreboards are for Fencing ( very quick ) while mine are mainly cricket ( update the score in 5 minutes while the batsman is wandering back to the pavilion ) or soccer where they spend 2 minutes doing the celebration dance after a goal , so the speed needs are different :slight_smile:

I've only done 45 myself, with data coming from a 1284P.
Data is daisy chained, no buffer needed. I did buffer SCK and SS.
Signal edge rise & fall times are the same for SPI vs shiftOut I believe. There should be no caps on control lines.

Hi Bob, Perhaps I will try SPI tonight on the prototype then if you say the rise and fall times are the same.

This is the project that I will be offering an sms update for, and why I bought the 1284mini from you.

If I can save time on the display, it might be better for the 2 serial ports to check the infrared and the SMS recieved ?

I am so busy building these boards, that I havn't even had chance to hook up the board I got from you yet.

expect a few " help me's " next week !

I am embarrassed to say was cleared with that damn 1nF cap on the end of the latch line for each row !

So put it across the power supply of the chip and see if it is better.

Each chip has its own 100nF across its 5v supply, but I was so surprised it worked as a mock up being run by one chip !

I agree with you that no digital signal needs a cap , I am sure my buffers will be fine.

I would use a fan out of no more that 16 when designing a circuit so those signals that go to all shift registers like the clock and the latch need to be buffered into groups of 16.

I did 9, but I had 9 shift registers and a buffer on a little card with a breakout connector, 5 boards that stacked up, so it was easy to organize that way for me.

I used a line driver chip many years ago for a large fanout. Cant remember what number it was though.

I will experiment as soon as I have all the boards assembled.

Not so much a line driver but just something like the 74LS04. Feed the signal into one of the buffers and the the output into all the other inputs on the chip. Then wire the output of each remaining buffer to groups of shift registers.

Thanks GM,

I got out my long abandoned ( when I found Arduino a couple of years ago ! ) box of TTL and CMOS chips yesterday to look though, but I realised that my 68 yo eyes are so bad (after working on these SMD boards this week ), and some of the numbers were printed poorly, that it will be quicker for me to pop round to a local supplier this morning.

I scoped the waveforms on my giant unbuffered daisy chain test jig last night, and it is the clock rise time that is struggling- 90nS instead of 20nS that the 595 datasheet requires, so I will see what happens when I buffer the clock and latch lines today.

I put a 4050 buffer ( single gate - not paralleled yet ) on the clock line to the 3 banks of displays and it has bought the rise time of the clock pulse down to about 25 nS , which is working fine.

So the prototypes will go out like this, but any future orders will have a 4050 chip on each pcb to drive the next one

I think I will also buffer the data line, not because it can't handle the load, but to keep the propagation delay the same to each daisychained pcb.

74xx04 in inverting buffer, you want non-inverting.
cd74hc4050 is just okay. 5mA drive current. Propagation times are not too bad.
(I would not use CD4050, just too slow.)
If you can get something in the AC family, like 74AC244, that would be great - 8 channels, plus 24mA drive current to handle any capacitance and keep edges nice & clean. Also very low propagation delay, <1/2 that of the 4050.

74xx04 in inverting buffer, you want non-inverting.

No not the way I described using it.

I am just going to get this first batch of prototypes out , they are working fine today with a 4050 buffer on the clock line but the next batch will have a buffer on each pcb to drive the latch, data and clock of the following pcb

I know that data is buffered in each chip, but I want to keep the same propagation delay on all 3 lines between all the boards, and in theory you could have an indefinite number of pcbs.

I am not including the notG blanking line as that has has no problems with pwm dimming on any number of boards