Hi guys,
I am starting a project on the Vidor4000.
I used the well-known Blinky sketch and it worked perfectly.
Now I'm trying to replicate the app.h file for bitstreaming to the FPGA.
At after loading the pinmapping and compiling I get errors that I can't place multiple pins assigned to pin location. Ok, I found out that this has something to do with the auto-assignments of Quartus for Active Serial. The documentation from Intel says that I should change the pin configuration under Device/Device and Pin/Dual-PurposePins from tri-stated to use as regular I/O.. After I did this, I only get one error for bMKR_D[8]/PIN_F16
This could be solved by manually unassigning this pin.
Ok, I compiled. After that I wondered why no .ttf was created. Ok I googled and created it manually via File/Convert_ Programming_Files with the mode 1-bit passive. Does anyone know how to configure Quartus to create this file automatically?
After creating the .ttf file, I wondered why this file is bigger (2MB) compared to the app.h of the example.
I reversed the bit order of my .tff file and in the .ino I changed the app.h to myapp.h.
But now the example with myapp.h does not work anymore.
Does anyone have an idea what is wrong? I think some Quartus settings are wrong but I have no idea which ones.
Questions:
- What is wrong that importing pinmapping leads to this mentioned error?
- Is it allowed to change from tri-statet to regular I/O and change from active serial to passiv serial in Quartus.
- How can I get the .ttf automatically?
- Any idea why myapp.h is bigger? Compiler settings?
P.S In the arduino IDE with default app.h I get the warning ./arm-none-eabi/bin/ld.exe: warning: changing start of section .rel.dyn by 1 byte 5 times. With myapp.h I did not get this warning at all.