Hello and Good morning sir,
I have 3 concerns.
- I looked at the timing diagram and compared it to the lcdCommand routine. Data is sent on the high-to-low enable signal AND when the register select and RW signals are low. From a diagram I drew up based on the high-to-low enable signal duration, this appears every 660 (230x3)ns. Seems to be related to the time for an instruction to be run as shown in the table of page 3 of the data sheet; so I'm putting the delay at 666ns between commands sent which is significantly smaller than that for an LCD as given in the text (100us).
- Which brings me to the next concern. How IS the delay worked out from the timing diagrams, in general? I take it the first delay is for the enable pin signal duration and the second the delay between commands and for the display to run the command? For example where does the program in the text come up with 1us and 100us for the 1st and 2nd delays respectively?
- How are the delays for the various routines obtained in general, like for LCD_data and the LCD_init; are they chosen as rounded figures relative to the times on the diagrams between successive highs and lows? How does the author come up with 2000ms in the LCD_init routine?
- We placed the connecting ribbon with the CIODIO in another computer last week. I connected the unit directly to the arduino using jumpers and the wiring scheme which. What i noticed is that when i connected all the jumpers in order from digital pin12 to digital pin2 of the arduino to the corresponding pins on the display and uploaded the program, there wasn't a problem; when i then connected digital pin1 to pin 7 of the display and tried to upload, I get the error 'avrdude: stk500_getsync(): not in sync: resp=0x00' which is said to refer to a communication problem with the board; was wondering what could be causing this?
...and still nothing with these changes uploaded.
Program VFD 05.pdf (124 KB)