Atmega2560 PWM 8MHz 33% Duty Cycle?

Projects Programming
1

Hi All,

I was wondering if it were possible to generate a high frequency of 8Mhz with a 33% duty cycle on my Arduino Mega 2560?

However, I'm starting to understand the the fact that having a high frequency has the trade-off of a lower PWM resolution. Hence I'm beginning to believe it's simply not possible to achieve.

The program below (hopefully) describes a 8Mhz PWM signal at a 50% duty cycle in mode 14 (fast PWM):

// set OC5C (pin 44) as PWM output
// fast PWM: PWM_frequency = clock_speed / [Prescaler_value * (1 + TOP_Value) ]
// mode 14 - fast PWM - frequency = 16MHz / (1*(1+1)) = 8Mhz

#include <avr/io.h>

void setup
{

    pinMode(44, OUTPUT);

    // fast PWM, set on match, clear on TOP, ICR5 holds TOP

    TCCR5A |= (1<<COM5A1) | (1<<COM5A0) | (1<<WGM51);

    // use ICR5 as TOP and CLK/1 as prescaler

    TCCR5B |= (1<<WGM53) | (1<<WGM52) | (1<<CS50);

    // 50% duty cycle

    OCR5A = 0; 
    ICR5 = 1;
}

Similarly, in mode 7 (fast PWM) at 8Mhz with the same 50% duty cycle:

void setup()
{

    pinMode (44, OUTPUT);

    // enabling OCR5A and OCR5B in mode 15, fast PWM with OCR5A as TOP

    TCCR5A |= (1<<COM5A1) | (1<<COM5B0) | (1<<WGM51) | (1<<WGM50);

    // no prescaling CLK/1

    TCCR5B |= (1<< WGM52) | (1 << CS50);

    // 50% duty cycle

    OCR5A = 1;   // count to 2, zero-relative
    OCR0B = 0;   // duty cycle

}

My code is likely to have mistakes in it but I hope it shows the jist of what I'm asking. For instance, in the last example, I could change OCR5A = 3 and OCR5B could then take on the values 0, 1 or 2, in turn enabling duty cycles of 66% or 33% respectfully.

My question again, is whether it's possible to have an 8Mhz PWM signal with a 33% duty cycle?

2

Not on a mega2560, nor most other atmega chips.

You could get closer on something with a high-speed timer, like the tiny85 or tiny861 (I don't know of any atmega's with arduino core that have the high speed timer); you can clock timer1 off the PLL; at Vcc=5v, the clock signal going in would be 64 MHz, leaving you a lot more resolution - though you're not going to be able to do exactly 33%, since you've got 8 steps, which isn't divisible by 3...

Yeah, I don't see a way to achieve it within the AVR product line.

3

Hi DrAzzy,

first of all, thank you very much for your prompt reply! :slight_smile: Honestly, I was slowly coming to the same conclusion myself. I think I'll have to go for a separate clock generator IC for my circuit in this case. If you had any recommendations off the top of your head, I'd welcome your thoughts. Otherwise, I've got some more research to do!

thanks again,

G