ATMega328 and 7400 chips

Other Hardware General Electronics
3

That wasn't the question.

Schematic is:

Master RX:

  1. Search on NAND OR gate, plenty of references.
  2. Pin 9 of each UNO slave to input of NAND OR gate, out of OR Gate to MEGA pin 19.

Master TX:
Mega Pin 18 to UNO slaves pin 8.

That's the schematic.

Remember this works direct and works with they are tied together (2 outputs to 1 input). So add the OR gate and splat!

I'm sure there will now be more irrelevant questions.