ATMEGA328P - running at low clock speed to save power

I have been following the Nick Gammon tutorial on power saving;

https://www.gammon.com.au/forum/?id=11497

I have an ATMega328P running at 3.3V and 8Mhz via an MCP1702 regulator. The board has the serial download circuit, a switch and LED.

In deep sleep mode, and wake up by intrrrupt from the switch, the current consumption is 2.0uA, about normal for a deep sleep ATmega328P.

The Nick Gammon tutorial gives information on reducing the processor clock divider to save power and suggests that at a clock divisor of 256, the current falls to 288uA. When I run the suggested code the clock speed does indeed fall to 8Mhz\256, but the current is 829uA.

Does anyone have any insight as to why the current does not fall to circa 300uA ?

#include <avr/power.h>

void loop()
{
}

void setup()
{
  //slow clock to divide by 256
  clock_prescale_set (clock_div_256);

 //disable ADC
 ADCSRA = 0;
 power_all_disable();                             
}

only to be sure, is it realy 328p, not 329 without p?

with lower speed the current is lower but it takes longer to execute the same set of instructions so you consume the same amount of power as with higher speed

Juraj:
only to be sure, is it realy 328p, not 329 without p?

with lower speed the current is lower but it takes longer to execute the same set of instructions so you consume the same amount of power as with higher speed

The Ps I tested did have the right device ID. I tested a non P and it was worse, but not much, 967uA.

I realise the code takes longer. The tracker program I would use it with has several gaps when its idle, so it might as well run at a low clock speed during the idle periods.