ATtiny85 has trouble sleeping

Hello everyone!

I'm having an odd problem with ATtiny85 in sleep mode.
The very simple code bellow executes ok with ~8 sec of sleep between the 2, 50ms blinks.

#include <avr/sleep.h>
#include <avr/power.h>
#include <avr/wdt.h>
int led = 0;
volatile bool f_wdt=1;
// the setup routine runs once when you press reset:
void setup() {                
  // initialize the digital pin as an output.
  pinMode(led, OUTPUT);
  digitalWrite(led, HIGH); 
  delay(2000);
  digitalWrite(led, LOW);
  setup_watchdog(); 
}

void loop() {
  int  i;
  if (f_wdt==1){ 
    f_wdt=0;

/*  <--- here, there by problems
   for (i=0;i<8;i++){
     digitalWrite(led, HIGH);
     delay(1000);
     digitalWrite(led, LOW);
     delay(1000); 
   }
 */
 
   digitalWrite(led, HIGH);
   delay(50);
   digitalWrite(led, LOW);
    //enter sleep
    system_sleep();
    //resume
    digitalWrite(led, HIGH);
   delay(50);
   digitalWrite(led, LOW);
  }
}
void system_sleep() {
  set_sleep_mode(SLEEP_MODE_PWR_DOWN); // sleep mode is set here
  sleep_enable();
  sleep_mode();                        // System sleeps here
  sleep_disable();                     // System continues execution here when watchdog timed out 
  power_all_enable();
}
// Watchdog Interrupt Service / is executed when watchdog timed out
ISR(WDT_vect) {
  f_wdt=1;  // set global flag
}
void setup_watchdog(){
  /*** Setup the WDT ***/
  /* Clear the reset flag. */
  MCUSR &= ~(1<<WDRF);
  /* In order to change WDE or the prescaler, we need to
   * set WDCE (This will allow updates for 4 clock cycles).
   */
  WDTCR |= (1<<WDCE) | (1<<WDE);
  /* set new watchdog timeout prescaler value */
  WDTCR = 1<<WDP0 | 1<<WDP3; /* 8.0 seconds */
  //WDTCR = 1<<WDP3; /* 4.0 seconds */
  /* Enable the WD interrupt (note no reset). */
  WDTCR |= _BV(WDIE);
}

If i activate the for() section in the code, the system appears to enter in sleep mode while for() is executed and it wakes up only 2 or 3 seconds after for () was finished. A strange and unexpected behavior! Maybe you can spot a mistake in the code or you can help me with a better example of 85 sleep mode. Thanks!

From the datasheet (highlights added)...

Bit 6 – WDIE: Watchdog Timeout Interrupt Enable
When this bit is written to one, WDE is cleared, and the I-bit in the Status Register is set, the Watchdog Time-out Interrupt is enabled. In this mode the corresponding interrupt is executed instead of a reset if a timeout in the Watchdog Timer occurs.

If WDE is set, WDIE is automatically cleared by hardware when a time-out occurs. This is useful for keeping the Watchdog Reset security while using the interrupt. After the WDIE bit is cleared, the next time-out will generate a reset. To avoid the Watchdog Reset, WDIE must be set after each interrupt