ATTiny85 watchdog reset and pwm in same code

Hi, I'm very new here. I'm trying to work on some code originally posted here Technoblogy - Audio Sample Player where it plays a wav file stored in progmemory. After it plays it goes to sleep. I'm trying to reset it after 240 seconds so it plays again, and not fully understanding the watchdog setup routine. I've cut out all the hex data because it isnt relative.
Am I not enabling the watchdog correctly?

#include <avr/pgmspace.h>
#include <avr/sleep.h>
#include <avr/wdt.h>
#define adc_disable() (ADCSRA &= ~(1<<ADEN))

// Audio encoded as unsigned 8-bit, 8kHz sampling rate
PROGMEM const unsigned char hello[]= {
0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
};

unsigned int hello_len = 5936;
unsigned int p = 0;

// watchdog interrupt
ISR(WDT_vect)
{
wdt_disable(); // disable watchdog
}

void myWatchdogEnable(const byte interval)
{
MCUSR = 0; // reset various flags
WDTCR |= 0b00011000; // see docs, set WDCE, WDE
WDTCR = 0b01000000 | interval; // set WDIE, and appropriate delay

wdt_reset();
set_sleep_mode (SLEEP_MODE_PWR_DOWN);
sleep_mode(); // now goes to Sleep and waits for the interrupt
}

void setup() {
// Enable 64 MHz PLL and use as source for Timer1
PLLCSR = 1<<PCKE | 1<<PLLE;

// Set up Timer/Counter1 for PWM output
TIMSK = 0; // Timer interrupts OFF
TCCR1 = 1<<PWM1A | 2<<COM1A0 | 1<<CS10; // PWM A, clear on match, 1:1 prescale
GTCCR = 1<<PWM1B | 2<<COM1B0; // PWM B, clear on match
OCR1A = 128; OCR1B = 128; // 50% duty at start

// Set up Timer/Counter0 for 8kHz interrupt to output samples.
TCCR0A = 3<<WGM00; // Fast PWM
TCCR0B = 1<<WGM02 | 2<<CS00; // 1/8 prescale
TIMSK = 1<<OCIE0A; // Enable compare match
OCR0A = 124; // Divide by 1000

set_sleep_mode(SLEEP_MODE_PWR_DOWN);
pinMode(4, OUTPUT);
pinMode(1, OUTPUT);
}

void loop() {
// sleep for a total of 240 seconds
int i;
for (i = 0; i <30; i++)
{
myWatchdogEnable (0b100001); // 8 seconds
}

// Sample interrupt
ISR(TIMER0_COMPA_vect) {
char sample = pgm_read_byte(&hello[p++]);
OCR1A = sample; OCR1B = sample ^ 255;

if (p == hello_len) {
adc_disable();
sleep_enable();
sleep_cpu(); // 1uA
}
}