CrossRoads:
How about this:
SPI.transfer()s to 8 74HC595 shift registers =>64 bits, pick off ouptut in groups of 5.
Output of each shift register drives an R2R Ladder.
http://www.bourns.com/pdfs/r2r.pdf (the heart of most DACs)
and then 3 quad op-amps to make voltage output into your controller.500 Hz is 2mS period = 32,000 clock cycles. Seems like more than enough to update 8 bytes & shift them out via PWM to create your output levels.
this the essence of blink with delay. Every 2mS you do a little burst of transfers, then spend the rest of the time doing other stuff.
Trade off cost too - 8 74HC595s, 12 resistor networks, 3 quad op amps
This is definitely a no go, it can't compete with the DAC solutions. I found another alternative: DAC084s085. It has SPI and the cost are reasonable.