bi-directional level shifter - analysis question

I am interested in getting other opinions on this, where it says the following on this page,
under Use two mosfets.
http://playground.arduino.cc/Main/I2CBi-directionalLevelShifter

The gates of the mosfets becomes active if either one of the signals is pulled down. The internal diode is used to make the gate active if the drain of the mosfet is pulled down. The gate is always connected to the lower voltage.

I find the statement a bit nebulous, especially the part where it says "used to make the
gate active" in the middle sentence, and the 3rd sentence makes no sense to me at all.

As I see it, if the driving signal is applied from the right-hand side, when the signal goes
low, it's the internal substrate diode that pulls the output [left-hand side] down, and this
has nothing to do with the FET action of the MOSFET itself.

IOW, in this situation, it works the same as if all you had was a diode pointing to the
right, plus a pullup R on the left. Yes/no?

Referring to the source of those illustrations, app note NXP AN10441.
My understanding of app note is this:
The gate is connected to the 3V3 source. When the drain is high and the source connected to the 3V3 side goes low the mosfet conducts and pulls the 5V side low. When the 5V side goes low it pulls the 3V3 side low through the Fet body diode.
The APP Note has a better explanation that I did here but I am essentially correct, I believe.
I have built several of these level shifters and found them to work perfectly both for single and dual direction bus's. This is applicable to any level translation, single or bi directional IIC, SPI or TTL level RS232. 2N7000 mosfets work well but the VGth is too low to work at any lower bus voltages. If your design requires lower bus voltages use the BSS138 mosfet.
I attached the app note for reference.

Bob

AN10441.pdf (52.4 KB)

From that appnote,

  1. A 5 V device pulls down the bus line to a LOW level. The drain-substrate diode of the
    MOS-FET the ‘lower-voltage’ section is pulled down until VGS passes the threshold
    and the MOS-FET starts to conduct. The bus line of the ‘lower-voltage’ section is then
    further pulled down to a LOW level by the 5 V device via the conducting MOS-FET. So
    the bus lines of both sections go LOW to the same voltage level.

This answers a question I was wondering about. Forgetting about the substrate diode,
it implies the MOSFET will conduct about the same, regardless of which way the D and
S pins are connected.

In the case of the level-shifter ckt for item 3, the substrate diode initially conducts, but
then the MOSFET turns on, and effectively shorts the diode. It the gate were not being
held high, then the diode alone would do the job.

I had looked at Philips Applications Note AN97055 referenced on the page cited, but the
NXP appnote is a much better description.

Take a look at TI's TXB0101, 0102, 0104, 0106, 0108 family for similar performance all nicely packaged up.

I've seen the various chips that people use, but was interested in understanding the
actual analog operation of the MOSFET ckt indicated. Thanks.

Nice solutions for more than one or two lines, I wonder though if a quad package is less money than 4 BSS138 mosfets..? both are SMT and the IC is simpler to use... but I wouldn't consider it for breadboard use because it requires a BOB and the 2N7000's have wires, great for breadboarding. In my experience BOB's are nice for some types of development and better for finished projects but poor for breadboarding and unworkable for commercial enterprise for obvious reasons. For those reasons I rarely suggest anything but breadboadable solutions except where considerations of safety or complexity dictate otherwise.

Bob