BU2090 shift register

Hi all,

I'm just getting into shift registers and have his a knowledge wall where I can't seem to find how to interface a shift register without a latch pin to arduino.

All the arduino tutorials mention the use of the latch pin to change the outputs.

I have a BU2090 12 bit SIPO and I need to learn how to code it to work correctly.

I'm a bit perplexed how a chip without a latch pin will know where the 1st bit is in the 12 bit stream.

Am I thinking correctly?

Any help with knowledge or coding would be greatly appreciated. TIA

Damo76:
I'm a bit perplexed how a chip without a latch pin will know where the 1st bit is in the 12 bit stream.

Am I thinking correctly?

I think no. You can still write bits to the SIPO, it's just that the bits on the output cannot be changed all at the same time, because of the missing latch. They would appear to shift from output to output as you clock them in. If you clock them rapidly, that might not matter for some applications.

yes but if you do it rapidly how will the shift register know where the start and end bit is? what if one bit goes missing or is that highly unlikely?

The chip is not smart. Your sketch
has to keep track of timing and
shifting in the proper number of bits.
It is not likely that a bit will get
lost inside the chip.
Herb

Damo76:
yes but if you do it rapidly how will the shift register know where the start and end bit is? what if one bit goes missing or is that highly unlikely?

It can't know. But if you pause it, you have effectively defined the end. Latching the data won't help with missing bits at all. So you haven't lost any performance on that account.

Thanks heaps guys!

Damo76:
what if one bit goes missing or is that highly unlikely?

Just doesn't happen in digital electronics. If that happens, everything fails; your PC crashes, the toast burns, the refrigerator defrosts and the Roomba eats the cat etc. :grinning:

Loss of data is a possibility on serial communications lines such as Ethernet or WiFi but these are implemented with CRC checking and retransmission procedures to cope with it.

I wouldn't be so sure. Long wires, noisy environment, high speed etc. can cause a glitch on the clock causing lost/gained bit.

Smajdalf:
I wouldn't be so sure. Long wires, noisy environment, high speed etc. can cause a glitch on the clock causing lost/gained bit.

Also gamma rays and subatomic particles. Even the plastic that is used to encapsulate IC's have traces of radioactive material (just as everything on earth does). When a radioactive atom breaks down, a particle from that event sometimes ionizes a transistor enough to glitch it. It is one reason for ECC RAM.

And as I said, if any of these things happens, your system is unreliable and crashes. :roll_eyes:

Ok so I'm assuming that it will shift so fast to the final position that if for example I was using it to control LEDs that it would happen so fast i'd never notice it flicking all the other LEDs as it moves to the final position?

From the data sheet:

BU2090F/BU2090FS are an open drain output driver.It
incorporates a built-in shift register and a latch circuit to
turn on a maximum of 12 Outputs by a 2-line interface,
linked to a microcontroller.
An open-drain output provides maximum 25mA current.

So it does have a latch, just not a latch pin. I guess the latch is triggered by timing of the clock/data pins somehow, but the data sheet is inscrutable on that point.

From a different data sheet:

For the BU2090 / F / FS, data input is shifted to the 12-bit internal shift register on the rising edge of a clock pulse.
On the falling edge of the pulse, if the DATA pin is HIGH, the data in the shift register is output in parallel to Q0 to Q11.

Which now makes sense to me! Should be easy enough to code that.

I'm a bit perplexed how a chip without a latch pin will know where the 1st bit is in the 12 bit stream.

The important thing is how to tell the chip that it now has the last bit in the 12 bit stream, and the data is ready to be latched. The answer is that for the first 11 bits, the data line must be LOW as the clock line falls from HIGH to LOW. But for the 12th bit the data line must be HIGH as the clock line falls. You get it?

I get it, and I coded it successfully. Thanks for the help

Damo76:
I get it, and I coded it successfully. Thanks for the help

Well done. Please show your appreciation by giving something back to the Arduino community: post your successful code so that others facing the same problem in future can see how you solved it.

aarg:
Also gamma rays and subatomic particles. Even the plastic that is used to encapsulate IC's have traces of radioactive material (just as everything on earth does). When a radioactive atom breaks down, a particle from that event sometimes ionizes a transistor enough to glitch it. It is one reason for ECC RAM.

The size of transistors in a 5V microcontroller are much more robust than a single capacitor in a high-density
DRAM chip. The smaller the transistor or RAM cell the more vulnerable it is to background radiation. Not worth
working about unless you are designing for space or particle accelerators.

Hello All.
I have some problem with BU2090.
It's my CLK and Data signal
https://drive.google.com/file/d/1NZIXMjnXWcm4L3Zay-31c22EfcTEN_ZW/view?usp=sharing

It's datasheets CLK and Data signal
https://drive.google.com/file/d/12P89QDVIl7RW5p_W4l0_FYQYWujQtN-w/view?usp=sharing
What's wrong?
Thanks a lot!

beavisgood:
What's wrong?

That's easy to answer! You didn't read the forum guide! It's at the top of each forum section and all new forum members should read it before posting so they know what to post and how to post it.

Hi,
Good to see you got it working.
For others this page of the datasheet will help;


Tom.. :slight_smile: