bug in Arduino Due linker script - incorrect values?

I have been tinkering around with the Arduino linker scripts lately; and I noticed a small issue

/* Memory Spaces Definitions */
MEMORY
{
  rom (rx)    : ORIGIN=0x00080000, LENGTH=0x00080000 /* Flash, 512K */
  sram0 (rwx) : ORIGIN=0x20000000, LENGTH=0x00010000 /* sram0,  64K */
  sram1 (rwx) : ORIGIN=0x20080000, LENGTH=0x00008000 /* sram1,  32K */
  ram (rwx)   : ORIGIN=0x20070000, LENGTH=0x00018000 /* sram,   96K */
}

the hardware specs say 512K rom and 96kb of ram; but, it looks like the ram is incorrectly mapped - it should be:

/* Memory Spaces Definitions */
MEMORY
{
  rom (rx)    : ORIGIN=0x00080000, LENGTH=0x00080000 /* Flash, 512K */
  sram0 (rwx) : ORIGIN=0x20000000, LENGTH=0x00010000 /* sram0,  64K */
  sram1 (rwx) : ORIGIN=0x20080000, LENGTH=0x00008000 /* sram1,  32K */
  ram (rwx)   : ORIGIN=0x20000000, LENGTH=0x00018000 /* sram,   96K */
}

such that ram is actually sram0 and sram1 combined - that is, the ORIGIN of the memory area is correctly mapped - otherwise; the ram would start at 0x20070000 and effectively only render just 68k of ram for the developer (28672 bytes short). just in case anyone has run into issues with sketches that use more than 68k of SRAM.. this may be a fix for you.

Nope.

Read the SAM3X datasheet on page 32 / Section 7.2.1. SRAM0 is at 0x20000000, SRAM1 is at 0x20080000 and the combined 96k continuous is mirrored at 0x20070000. This is exactly how the current linker script reads. If you do it your way you'll actually only get 64k of RAM and trying to use the rest will cause nasty issues since it isn't mapped there.

Below is a copied section from the data sheet:
SRAM0 is accessible over the system Cortex-M3 bus at address 0x2000 0000 and SRAM1 at address 0x20080000. The user can see the SRAM as contiguous thanks to mirror effect, giving 0x2007 0000 - 0x2008 7FFF for SAM3X/A8, and 0x2007 8000 - 0x2008 7FFF for SAM3X/A4.

The only thing I don't like about the linker script is that it says the FLASH is at 0x00080000 which is sort of true but the processor really boots to address 0 where either FLASH0 or FLASH1 is mirror mapped so I thought it'd make more sense to set the FLASH section to address 0 but there are reasons they didn't do that.