Can we fix the RTC?

Hardware UNO R4 UNO R4 WiFi
7

I fixed my ISR. I needed to add one line to the handler.

The thing about these interrupts are that there's two places to think about. There's the registers for the CAC itself and the interrupt flags there, but also the registers and interrupt flags in the event link system.

I also needed to clear the IR bit in the IELSRn register for my interrupt. I added a function to list the different even t links and determined that mine was in channel 5.

This code spams out 1444 to 1449 or so repeatedly on my monitor.

#include "IRQManager.h"

volatile uint16_t result;
volatile bool fired = false;

void setup() {
  pinMode(13, OUTPUT);
  Serial.begin(115200);
  while (!Serial)
    ;
  Serial.println("Starting CAC Experiment!");

  printRegs();
  listEventLinks();

  setupCAC();

  printRegs();
  listEventLinks();

  Serial.println("End Setup!");


}

void loop() {

  heart();

  if (fired) {
    __disable_irq();
    uint16_t copy = result;
    fired = false;
    __enable_irq();
    Serial.print("Result : ");
    Serial.println(copy);
  }
}

void cacMendieHandler() {

  result = R_CAC->CACNTBR;
  // clear interrupt
  R_CAC->CAICR |= (R_CAC_CAICR_MENDFCL_Msk);
  R_ICU->IELSR[5] &= ~(R_ICU_IELSR_IR_Msk);

  fired = true;
}

void setupCAC() {

  R_MSTP->MSTPCRC &= ~((uint32_t)R_MSTP_MSTPCRC_MSTPC0_Msk);
  /*
I'm caculating 48MHz on MOSC / 32.767kHz on LOCO should
give a ratio of around 1:1465.
*/
  // set lower limit
  R_CAC->CALLVR = 700;
  //set upper limit
  R_CAC->CAULVR = 2100;

  // Set source clock
  R_CAC->CACR1 = 0x34;

  // set reference clock
  R_CAC->CACR2 = 0x09;

  // set interrupt


  IRQManager::getInstance().addMaskableInterrupt(0x48, cacMendieHandler);

  R_CAC->CAICR = (R_CAC_CAICR_MENDIE_Msk | R_CAC_CAICR_MENDFCL_Msk);

  // Set CFME in CACR0 to turn on the unit
  R_CAC->CACR0 = (R_CAC_CACR0_CFME_Msk);
}


void heart() {
  static uint32_t pm = millis();
  uint32_t cm = millis();
  if (cm - pm >= 1000) {
    pm = cm;
    digitalWrite(13, !digitalRead(13));
  }
}

void printRegs(){
  volatile uint32_t mstpcrc = R_MSTP->MSTPCRC;
  Serial.print("MSTPCRC : ");
  Serial.println(mstpcrc , HEX);

  volatile uint32_t cacr0 = R_CAC->CACR0;
  Serial.print("CACR0 : ");
  Serial.println(cacr0 , HEX);

  volatile uint32_t cacr1 = R_CAC->CACR1;
  Serial.print("CACR1 : ");
  Serial.println(cacr1 , HEX);

  volatile uint32_t cacr2 = R_CAC->CACR2;
  Serial.print("CACR2 : ");
  Serial.println(cacr2 , HEX);

  volatile uint32_t caicr = R_CAC->CAICR;
  Serial.print("CAICR : ");
  Serial.println(caicr , HEX);

  volatile uint32_t callvr = R_CAC->CALLVR;
  Serial.print("CALLVR : ");
  Serial.println(callvr , HEX);

  volatile uint32_t caulvr = R_CAC->CAULVR;
  Serial.print("CAULVR : ");
  Serial.println(caulvr , HEX);

  volatile uint32_t cacntbr = R_CAC->CACNTBR;
  Serial.print("CACNTBR : ");
  Serial.println(cacntbr , HEX); 

}


void listEventLinks(){
  for (uint8_t i=0; i<32; i++){
    volatile uint32_t val = R_ICU->IELSR[i];
    Serial.print("IELSR");
    Serial.print(i);
    Serial.print(" : ");
    Serial.println(val, HEX);
  }
}

Along with this addition in IRQManager class:

// Added Delta_G
//  allows to put any maskable interrupt into the table and keep last_interrupt_index up to date. 
bool IRQManager::addMaskableInterrupt(uint8_t eventMask, Irq_f fnc /*= nullptr*/) {
    /* getting the address of the current location of the irq vector table */
    volatile uint32_t *irq_ptr = (volatile uint32_t *)SCB->VTOR;
    /* set the displacement to the "programmable" part of the table */
    irq_ptr += FIXED_IRQ_NUM;
    bool rv = true;
    
    __disable_irq();
    
    *(irq_ptr + last_interrupt_index) = (uint32_t)fnc;
    R_ICU->IELSR[last_interrupt_index] = eventMask;
    
    R_BSP_IrqDisable((IRQn_Type)last_interrupt_index);
    R_BSP_IrqStatusClear((IRQn_Type)last_interrupt_index);
    NVIC_SetPriority((IRQn_Type)last_interrupt_index, 12);
    R_BSP_IrqEnable ((IRQn_Type)last_interrupt_index);
    
    last_interrupt_index++;
    
    __enable_irq();
    
    return rv;

}

Produces:

Starting CAC Experiment!
MSTPCRC : FFFFFFFF
CACR0 : 0
CACR1 : 0
CACR2 : 0
CAICR : 0
CALLVR : 0
CAULVR : 0
CACNTBR : 0
IELSR0 : 1E
IELSR1 : A9
IELSR2 : AA
IELSR3 : A8
IELSR4 : AB
IELSR5 : 0
IELSR6 : 0
IELSR7 : 0
IELSR8 : 0
IELSR9 : 0
IELSR10 : 0
IELSR11 : 0
IELSR12 : 0
IELSR13 : 0
IELSR14 : 0
IELSR15 : 0
IELSR16 : 0
IELSR17 : 0
IELSR18 : 0
IELSR19 : 0
IELSR20 : 0
IELSR21 : 0
IELSR22 : 0
IELSR23 : 0
IELSR24 : 0
IELSR25 : 0
IELSR26 : 0
IELSR27 : 0
IELSR28 : 0
IELSR29 : 0
IELSR30 : 0
IELSR31 : 0
MSTPCRC : FFFFFFFE
CACR0 : 1
CACR1 : 34
CACR2 : 9
CAICR : 2
CALLVR : 2BC
CAULVR : 834
CACNTBR : 5A7
IELSR0 : 1E
IELSR1 : A9
IELSR2 : AA
IELSR3 : A8
IELSR4 : AB
IELSR5 : 48
IELSR6 : 0
IELSR7 : 0
IELSR8 : 0
IELSR9 : 0
IELSR10 : 0
IELSR11 : 0
IELSR12 : 0
IELSR13 : 0
IELSR14 : 0
IELSR15 : 0
IELSR16 : 0
IELSR17 : 0
IELSR18 : 0
IELSR19 : 0
IELSR20 : 0
IELSR21 : 0
IELSR22 : 0
IELSR23 : 0
IELSR24 : 0
IELSR25 : 0
IELSR26 : 0
IELSR27 : 0
IELSR28 : 0
IELSR29 : 0
IELSR30 : 0
IELSR31 : 0
End Setup!
Result : 1448
Result : 1447
Result : 1447
Result : 1447
Result : 1448
Result : 1447
Result : 1447
Result : 1447
Result : 1447
Result : 1448
Result : 1447
Result : 1448
Result : 1447
Result : 1447
Result : 1447
Result : 1447
Result : 1448
Result : 1447
Result : 1448
Result : 1447
Result : 1447
Result : 1447
Result : 1448
Result : 1447
Result : 1447
Result : 1447
Result : 1447