Ch-4: Analog to Digital Converter Module of ATmega328P MCU

1. There is an ADC Module inside ATmega328P Microcontroller. The brief version is shown in Fig-1, and the detailed version is given in Fig-4.
ADCSum.png
Figure-1: ADC Module inside ATmega328P MCU

2. The ADC converts uni-polar (only positive) analog DC signal (range: 0V to 5V or 0V to 1.1V) into 10-bit binary value. A bi-polar ADC converts both positive and negative signals.

3. We will learn the details of this ADC Module by building a Thermometer of Fig-2. To measure the room temperature, we will use LM35 temperature sensor (Fig-3).

4. The ADC has six analog channels named as: Ch-0 to Ch-5. These channels are connected with APin-A0 (Analog Pin-A0) to APin-5 of UNO.

5. When the input DC signal is 0V, the ADC produces the following 10-bit data for B9-B0 bits:

B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ==> 000000 0000000000 = 0x0000 = 0 decimal

6. When the input DC signal is 5V (for the range: 0V – 5V), the ADC produces the following 10-bit data for B9-B0 bits:

B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
1 1 1 1 1 1 1 1 1 1 ==> 0 0 0 0 0 0 1111111111 ==> 0x03FF = 1023 decimal

7. When the input DC signal is 1.1V (for the range: 0V – 1.1V), the ADC produces the following 10-bit data for B9-B0 bits:

B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
1 1 1 1 1 1 1 1 1 1 ==> 0 0 0 0 0 0 1111111111 ==> 0x03FF = 1023 decimal

8. What is Full Scale (FS) of an ADC?
It is the maximum DC voltage at the input of ADC for which all output bits are 1s.
(1) For the range: 0V – 5V, the FS is 5 V and output bit pattern is:

00000 1111111111 in binary = 0x03FF in hex = 1023 in decimal.

(2) For the range: 0V–1.1V, the FS is 1.1V and output bit pattern is:

00000 1111111111 in binary = 0x03FF in hex = 1023 in decimal.

(3) The FS value (5V or 1.1V) is always connected at the VREF point of the ADC (Fig-1).

9. Assume Full Scale: 5V
(1) If the input voltage is VDT, what will be the value generated by the ADC? Let us give the name ADCV (ADC value) for the amount generated by the ADC for an input signal.

When the input DC signal is 5V, the ADCV = 1023 in decimal
So, when the input DC signal is VDT, the ADCV = (1023/5)*VDT decimal
(2) Given: VDT = 3.5V; what will be bit pattern for ADCV?

ADCV = (1023/5)*3.5  = 67.55  ~=  68 in decimal = 0x44 = 000000 (000100 0100) in binary

10. Assume Full Scale: 1.1V
(1) If the input voltage is VDT, what will be the value generated by the ADC?
(2) For what input DC signal (VDT), the ADCV will assume the following bit pattern?

0101000111 in binary

11. After the conversion of the input DC signal into binary form, lower 8-bit (B7 – B0) of the result enters into ADCL Register (Fig-1), and upper 2-bit (B9 – B8) enters into ADCH Register (Fig-1). The higher 6-bit (B15 – B10) of the ADCH Register are always 0s (Fig-1).

12. We can execute one of the following code/instruction/function to select FS (Full Scale: 5V or 1.1V) for the ADC.

(1) analogReference(DEFAULT); //to select 5V
(2) analogReference(INTERNAL); //to select 1.1V

13. Let us put the ADC into operation by executing the following sub-steps:
(1) Select Full Scale by executing the code/function of Step-12.
(2) Select the analog channel Ch-3. The LM35 sensor is connected at Ch-3 (Fig-3).
(3) Give START command to the ADC to begin conversion (Fig-1).
(4) Wait until conversion is finished. The conversion time is 80 µs. (The ADC clock is 125 kHz (Fig-1). One clock pulse is required to produce one bit data. So, the conversion time for 10-bit output is: (1/125x103)*10 = 80 µs. However, if we include settling time of S/H circuit, the ADC requires about 13 clock cycle for conversion. Then the conversion time is about: (1/125x103)*13 = 104 µs.
(5) After conversion, ADC value automatically enters into ADCL and ADCH Registers.

14. Step-13(2) to 13(5) are carried out one after another when the following code is executed. As a result, the output of ADC (B9 – B0 = the contents of ADCL and ADCH Registers) automatically enters into variable x.

unsigned int x = analogRead(A3); //Ch-3 is connected with APin-A3; x = 16-bit

15. Now, we have the following two lines of codes to put ADC into operation in order to convert analog signal at Ch-3.

(1) analogReference(DEFAULT); //to select 5V AS Full Scale (FS)
(2) unsigned int x = analogRead(A3); //Ch-3 is AT APin-A3; x = 16-bit

16. Given: FS = 1.1V, input DC signal = VDT and Ch-3. Find relationship between VDT and analogRead(A3).
(1) When input DC signal is 1.1V, the ADC value is: 000000 1111111111 = 1023 binary.
(2) When input DC signal is VDT, ADC value is: (1023/1.1)*VDT.
(3) When ananlogRead(A3) code is executed, ADC value (000000 + B9-B0 = 16-bit enter into variable x. That is:
unsigned int x = analogRead(A3);//unsigned means always +ve.; int = 16-bit[/code]
(4) So, the ADC value of Step-16(2) must be equal to x. That is:

x = (1023/1.1)*VDT
==> (1023/1.1)*VDT = ananlogRead(A3)
==> V[sub]DT[/sub] = (1.1/1023)*analogRead(A3) (It is a floating point number

[b]17.[/b]  Repeat Q-16 with FS = 5V.

[b]18.[/b] The Manufacturer of LM35 sensor says that: 
[b](1)[/b] When the room temperature is 25[sup]0[/sup]C, the sensor gives an output DC signal of 0.25 V. 
[b](2)[/b] When the room temperature is 75[sup]0[/sup]C, the sensor gives an output signal of 0.75 V.
[b](3)[/b] When the room temperature is T[sup]0[/sup]C, the sensor gives an output signal of V[sub]DT[/sub] V. 
[b](4)[/b]  In V[sub]DT[/sub], V stands for Voltage; D stands for DC voltage; T stands for temperature. 

[b]19.[/b] The room_tempertaure vs sensor_signal data of Step-18 can be documented as follows: 
A (25[sup]0[/sup]C, 0.25V) = A(T1, V[sub]DT1[/sub]),
B(75[sup]0[/sup]C, 0.75V) = B(T2, V[sub]DT2[/sub]), and 
C (T[sup]0[/sup]C, V[sub]DT[/sub]). 

[b]20.[/b]  From the given three points of Step-19, express T in terms of V[sub]DT[/sub]. ([b]Hints:[/b] Get V[sub]DT[/sub] = mT + c and then get T = f(V[sub]DT[/sub])).

(T1 – T2)/(V[sub]DT1[/sub] – V[sub]DT2[/sub]) = (T1 – T)/(V[sub]DT1[/sub] – V[sub]DT[/sub])
==> (25 – 75)/(0.25 – 0.75) = (25 – T)/(0.25 - V[sub]DT[/sub])
==> T = 100*V[sub]DT[/sub] (degree Celsius)

[b]21.[/b] Assume that the output signal (V[sub]DT[/sub]) of LM35 sensor (Fig-3) is connected with Ch-3 of the ADC via Apin-A3 of UNO. Now, Express T in terms of “analogRead(A3)” by combining equations of Step-16(4) and Step-20.  

[b]22.[/b]  Assume that the LM35 sensor has produced a DC signal (VDT) of 0.96V; find the value of T (Room Temperature) by manual solving of the equation of Step-21.

[b]23.[/b]  Assume that the Room Temperature (T) is 27.50C; find the value of the output DC signal (VDT) of LM35 sensor by manual solving of the equation of Step-21.

[b]24.[/b]  Write syntactically and semantically correct C-code for the equation of T of Step-21 so that T shows temperature signal with 1-digit precision. (Precision refers number of digits after the decimal point.)

[b]25.[/b]  Write syntactically and semantically correct C-code for the equation of T of Step-21 so that T shows only the integer part of the temperature.

[b]26.[/b]  Pictorial view of the prototype Thermometer
[img width=500 height=266]https://forum.arduino.cc/index.php?action=dlattach;topic=723338.0;attach=399236[/img]
Figure-2: LM35 sensor, UNO and 7-segent Display Unit based Thermometer.

[b]27.[/b]  Circuit Diagram for LM35 + UNO Based Thermometer
[img width=500 height=209]https://forum.arduino.cc/index.php?action=dlattach;topic=723338.0;attach=399238[/img]
Figure-3: Connection diagram among LM35, UNO and Display Unit

[b]28.[/b]  Internal Details of the ADC Module of ATmega328P MCU
[img width=500 height=409]https://forum.arduino.cc/index.php?action=dlattach;topic=723338.0;attach=399545[/img]
Figure-4: Internal details of the ADC Module of ATmega328P MCU

... to be continued.

LM35TherometerX.png

7segThreeLM35.png

ADCSum.png

29. Questions and Answers
(1) Create sketch for the circuit of Fig-3 so that temperature signal is acquired from the LM35 sensor at 2-sec interval and is displayed on the 7segent display unit.

#include "SevSeg.h"
SevSeg sevseg;
static unsigned long presentMillis;
float myTemp;

void setup()
{
  Serial.begin(9600);
  byte ccDPins[] = {A0, A1, A2};//DPin-A0, cc1 = DPin-A1
  byte segDPins[] = {8, 9, 10, 11, 12, 13, 6, 7}; //a = DPin-8, b, c, d, e, f, g, p
  //sevseg.begin(displayType, numDigits, ccDPins, segDPins, 
  //currentLimitResistor, updateWithDelays, keepLeadingZeros, disableDecPoint);
  sevseg.begin(COMMON_CATHODE, 3, ccDPins, segDPins, false, false, false, false);
  presentMillis = millis();
  analogReference(INTERNAL);
}

void loop()
{
  if (millis() - presentMillis >= 2000)
  {
    presentMillis = millis(); //keep present run time of UNO in presentMillis variable
    //----------------------------------------------
    unsigned int tempRaw = analogRead(A3);//LM35's output DC signal is connectec wit ch-3 of ADC
    myTemp = (float)100*(1.1/1023.0)*tempRaw;//myTemp holds binary32 formatted 32-bit value
    Serial.print("Room Temperature: ");
    Serial.print(myTemp, 1); 
    Serial.println(" degC");
    //----------------------------------------------
    sevseg.setNumber(myTemp, 1, LOW); //arg1 = temp, arg2 = no of decimal point arg3=10 base
  }
  sevseg.refreshDisplay();  //display refresh
}

(2)

  1. Write down the sequence of Steps that are to be carried out to convert an analog signal of Ch-3 into binary using the ADC Nodule of Fig-1.

Module or Nodule?

TheMemberFormerlyKnownAsAWOL:
Module or Nodule?

Thank you. I have taken care of your remark (Nodule>Module).

The ADC clock is 125 kHz. So, the conversion time for 10-bit output is: (1/125x103)*10 = 80 µs.

No.
A conversion normally takes thirteen cycles, or
104us at 125kHz.

This information is available in the device datasheet.

TheMemberFormerlyKnownAsAWOL:
A conversion normally takes thirteen cycles, or

It is a 10-bit SAR type ADC. So, 10 clock pulses would be suffice to create 10 bit data. Where is the use of addition 3 clock cycles as you have mentioned?

Setup for the SAR.
If you read the datasheet, you'll see that sample-hold doesn't even occur until 1.5cycles after the start of conversion is issued, so that leaves 8.5 cycles to do the conversion by your reckoning.

RTFM early, RTFM often.

I am sorry if you prefer to using RTFM instead of RTMF! :slight_smile:

The steps that are followed to put ADC into operation:
1. Select Vref and Channel using ADMUX Register.
(The S/H circuit is settled for which few clock cycles are spent.)

2. Issue START command to begin conversion with the help of ADCSRA Register.
How many clock cycles would be required to finish conversion? 10 or 13? You are saying 13; because, the Manual says so.

Should we include the S/H settling time with the actual conversion time? If yes, then the acceptable answer is 13 clock cycles.

3. The EOC status is reflected in the ADCSRA Register, which the user program monitors and reads the ADC data.

I guess the question boils down to "Who do I believe and trust - the company that made the device, or some random geezer on the Web?"

Of course, the Company that has made the chip.

But, the readers have the liberty to scrutinize the contents of the data sheets against their reasonings which could be wrong eventually.

GolamMostafa:
Should we include the S/H settling time with the actual conversion time? If yes, then the acceptable answer is 13 clock cycles.

So, why did you state that the answer is 10?

(2) Select the analog channel Ch-3.
(3) Start the conversion
(4) Wait until conversion is finished. The ADC clock is 125 kHz. So, the conversion time for 10-bit output is: (1/125x103)*10 = 80 µs.
(5) After conversion, the binary value automatically enters into ADCL and ADCH Registers.

TheMemberFormerlyKnownAsAWOL:
So, why did you state that the answer is 10?

The following excerpt has not included the setup time of the SAR in the calculation of conversion time:

e

Yeah, which bit of your random Google search refers to the AVR's SA ADC timing?

Obviously, a ten bit binary chop is going to take at least ten cycles, but a conversion isn't just a binary chop.

It's no good raising your students' expectations with a 12.5kHz conversion rate, when they'll be lucky to get a 9kHz rate.

You're mixing principles with practicals.

1. ADC Timing of ATmega328P MCU


Figure-1:

2. The diagram of Fig-1 says very clearly that the conversion time is 13 clock cycles of which 1.5 (~=2) clock cycles are spent for the settling of SAR (update of Vref, Channel, and S/H). So, the conversion time is actually 11 clock cycles. Why is it 11 clock cycles when the ADC is 10-bit?

3. The answer of the question of Step-2 could be found in the following excerpt taken from Page-420 of this book: Digital Electronics by: Christopher E. Strangio.

"A tracking converter can make only one incremental step per clock pulse. Thus, an eight-bit tracking converter, for example, may take anywhere from 1 to 255 clock pulses in order to reach a new conversion value. With this characteristic the conversion time is directly proportional to the rate of change of the analog signal input, and if any part of the analog signal changes more than one incremental step per clock pulse, substantial error is introduced. The successive approximation converter is a compromise between the best and worst feature of the tracking converter. For an 'n'-bit successive approximation A/D, exactly 'n+1' clock pulses are required for a full conversion cycle, no matter what the analog input may be. An eight-bit converter would, for example, always require nine clock pulses to obtain a valid digital output."

4. So, my understanding that a 10-bit SAR type ADC would take 10 clock cycles as conversion time is flawed due to lack of proper understanding of the excerpt of Step-3.

5. I hope that that issue is resolved.

GolamMostafa:
So, the conversion time is actually 11 clock cycles. Why is it 11 clock cycles when the ADC is 10-bit?

Because the SA register has to be initialised by the ADC state machine?

Edit: just realised the question was rhetorical

TheMemberFormerlyKnownAsAWOL:
Because the SA register has to be initialised by the ADC state machine?

The conversion period of 13 clock cycles for the 10-bit ADC of Atmega328P is accounted as follows:
1. 1.5 cycles (~=2) cycles are for Converter Initialization (Vref set, MUX set, and S/H settling) by the ADC State Machine.

2. 10 cycles for actual conversion of an analog sample to create 10-bit data (Fig-1).

3. 1 cycle used by ADC State Machine to load the ADC value into output registers (Fig-1).
SARConversion.jpg
Figure-1:

SARConX.jpg

SARConversion.jpg

SARConX.jpg

This topic was automatically closed 120 days after the last reply. New replies are no longer allowed.