cmos OR GATE

Dear all,

What is Difference between VDD and VSS in below data sheet attached.
IS there any GND PIN?
what is voltage given @ VDD /VSS to run simple test.

OR GATE.pdf (115 KB)

VDD is the supply. VSS is the ground (or most negative point of the supply).

The specs say it will run up to 20V. For a simple test, use +5V on VDD and connect 0V to VSS.

The reason such symbols were used dates back to early NMOS chips I believe, when all the MOSFET sources went to 0V and all the drains were pulled up to V+

Since CMOS logic chips were able to run from 3V to 15V supply, it didn't make sense to label the supply voltage, so these symbol names were carried on (despite the fact that CMOS uses pMOS and nMOS so sources and drains don't imply any voltage rail.

Similarly from TTL the names Vee and Vcc were used for 0V and 5V respectively (despite the fact the voltage was unique).

It's all a bit crazy really, but Vdd/Vss mean positive/negative supply (and negative supply is usually ground these days). Note that some logic chips (ECL) used to have the positive supply as ground, just to add to the confusion.

ECL http://en.wikipedia.org/wiki/Emitter-coupled_logic My first job as a co-op student (after 2 yrs of college) was measuring characteristics of 10K and 100K ECL at Digital Equipment Corp, DEC, which is now gone. Really fast stuff compared to the 16 MHz Arduino's. See the chart towards the bottom here: http://en.wikipedia.org/wiki/Logic_family But also really power hungry.

I remember using some Motorola ECL dividers as prescalers. These days one gets all that including the VCO and the PLL in a small 8 pin chip that consumes only tens of mA and work to several GHz.

And inexpensive too. Amazing how far things have progressed.

Very true, it's mind boggling.