even then it only responds to a changing edge not a rising or falling like INT0 and INT1 (Can't find the web pages where I read that )
13.2.1 EICRA – External Interrupt Control Register A
The External Interrupts 2 - 0 are activated by the external pins INT2:0 if the SREG I-flag and the corresponding interrupt mask in the EIMSK is set. The level and edges on the external pins that activate the interrupts are defined in Table 13-1.
Table 13-1
ISCn1 ISCn0 Description
0 0 The low level of INTn generates an interrupt request
0 1 Any edge of INTn generates asynchronously an interrupt request
1 0 The falling edge of INTn generates asynchronously an interrupt request
1 1 The rising edge of INTn generates asynchronously an interrupt requestNote: 1. n = 2, 1 or 0.
When changing the ISCn1/ISCn0 bits, the interrupt must be disabled by clearing its Interrupt Enable bit in the EIMSK Register. Otherwise an interrupt can occur when the bits are changed.
There is nothing to indicate INT2 is any different than INT1 or INT0