I'm back with a vengeance and sticking at the solution! I've now mapped the flow reader for 200 input pulse values and despite what I thought, its output reading V input frequency is precisely linear with <0.5% error. At the low flow end a 37Hz input needs to be 31.6 Hz (say 32 Hz?). The input frequency required for my maximum flow is 527 Hz.
From some research, what I am trying to create with Arduino is 'fractional clock frequency division', which I'm finding hard to understand and even contemplate coding. So with the above values I want to reduce the frequency output from a sensor by a factor of 0.865 throughout its range. The input frequency with a 50% duty cycle changes up and down in real time according to liquid flow rate and stops, but acceleration is relatively slow compared to microprocessing speeds?
I've also looked at phase locked loop options, but nervous about the loop staying locked and vco output frequency stability and jitter.
I put the Arduino nano back in its box for a while to investigate a non-Arduino solution. I breadboarded 3 X CD4089 Binary Rate Multipliers cascaded in add mode with binary coefficients 13,13,6. Fortunately for this application, the flow meter is only counting pulses for its totalizer. The realtime flow readings are extremely laggy and can easily tolerate some dropped pulses using a Binary Rate Multiplier. Fortunately, I had a dozen in my CMOS box. Using 3 CD4089s gives me sufficient granuality to get good conversion accuracy by setting DIP switches, I can fine tune the down conversion 'frequency' in terms of dropped pulse numbers. I'm also fortunate the replacement sensor output is a higher frequency and not far from what the flow meter head requires. The CD4089s would need to be battery supported and always on. Something to take account of for an Arduino solution?
I still want to get an Arduino software sketch solution for 'fractional clock frequency division' with a variable frequency clock rate. I thought this would be something others have needed, particularly for synthesisers? Ideally I'd like the down converted output frequency to be near a 50% duty cycle, but I think that might be hard to achieve.
I am grateful to johnwasser for your input. I'll try to understand your sketch snippet and get it working either simulated or real time. Onwards and upwards!