D Flip Flip - Positive Edge question

Hi,

I have a SN74S74N chip that I am experimenting with in building a flip-flop.

I'm just using GND and 5V signals (no arduino).

I've powered the chip, pulled preset (pin1) and clear (pin4) high and attached an LED to Q (pin5).
I've left the clock (pin3) floating for now, and attached a jumper wire to data (pin2) that I use to set it to gnd (low) or vcc (high).

The LED is latching fine (only copying D to Q when it receives a clock pulse). But I'm having some trouble understanding the positive-edge, or rising-edge aspect.

With the clock (pin3) floating, it sits stable at 1.5v (low). Now let's assume Q=1 and I've now set D=0. If I then insert a jumper wire from pin3 to 5V , D is not transferred to Q.

So why isn't placing a jumper wire from pin3 to 5V considered a clock pulse, and a rising edge, causing D to be copied to Q ? (after all, pin 3 was at 1.5V (low), and is now set to 5V by the jumper wire (high)

On the other hand, if I place the jumper wire from pin3 to 0V, D is copied to Q. Why is that ? pin 3 went from 1.5V to 0V, how could this be seen as a rising-edge trigger ?

How should I wire the clock pin if simple want to simulate a rising-edge clock pulse using a jumper wire ?

That is an LSTTL IC, so, it's High and Low are different
than CMOS IC's: Low = 0.8 V max., High = 2.0 min.
Edge triggered indicates that the input signal just has
to trigger the FF, then it can return to it's other state.
Herb

Do not leave the 'clock' pin floating.

Tie it HIGH with a resistor.

Bring the 'clock' to GND for a LOW, release the pin to go to HIGH.

On a LOW to HIGH transition, whatever is on D is transferred to Q.

Note: switches can bounce so you may want to look into a RS latching circuit to remove the switch bounce.

larryd:
Do not leave the 'clock' pin floating.

On this 74S part, you can, at least for experimental purposes. The clock input has an 18k internal pull up resistor. See page 3.

aarg:
On this 74S part, you can, at least for experimental purposes. The clock input has an 18k internal pull up resistor. See page 3.
https://www.ti.com/lit/ds/symlink/sn74s74.pdf

That's why I thought that the internal pull-up, giving the clock pin 1.5V would translate to LOW and me attaching it directly to 5V would set it HIGH.

So the reason this was not working was because, as written in the datasheet the "high level input voltage" = 2V and "low level input voltage" = 0.8V ?

herbschwarz:
That is an LSTTL IC, so, it's High and Low are different
than CMOS IC's: Low = 0.8 V max., High = 2.0 min.
Edge triggered indicates that the input signal just has
to trigger the FF, then it can return to it's other state.
Herb

Thx a lot ... was not aware of these subtleties ... I'm actually busy repairing a 1983 videocard that contains about 50 of these logic chips.

I replaced a SN74S174N chip with a SN74ALS174N would that be ok ? (I checked the datasheet and noticed that VCC, VIH and VIL were the same).

These are all variants of TTL technology, many decades obsolete.

The threshold voltages and behaviour with floating inputs is different from today's CMOS chips
(with CMOS never leave any input floating unless the datasheet indicates an internal pull-up or pull-down).

With any logic clock input of any logic family you cannot use mechanical switches sensibly, because they
bounce multiple times, sometimes hundreds of times, causing random bizarre behaviour due to random
numbers of clock pulses.

An Arduino pin makes a much better behaved signal to feed to a clock input, for instance one pulse per second:

void loop ()
{
  digitalWrite (pin, HIGH) ;
  delay (500) ;
  digitalWrite (pin, LOW) ;
  delay (500) ;
}

You should always have a decoupling capacitor for each logic chip in your experimentation to ensure
reliable operation too.

ddewaele:
That's why I thought that the internal pull-up, giving the clock pin 1.5V would translate to LOW and me attaching it directly to 5V would set it HIGH.

A pull-up resistor produces a HIGH level when nothing else is connected. Or do I misunderstand?

ddewaele:
That's why I thought that the internal pull-up, giving the clock pin 1.5V would translate to LOW and me attaching it directly to 5V would set it HIGH.

So the reason this was not working was because, as written in the datasheet the "high level input voltage" = 2V and "low level input voltage" = 0.8V ?

1.5V is clearly in the forbidden region, so the behaviour is actually undefined. Unconnected inputs for TTL are undefined, but almost invariably read as HIGH, with a strong possibility of noise getting in.

Every unused TTL input should be connected to 0V or via a resistor(*) to 5V. Never connect TTL inputs directly to the 5V rail, they are not designed to handle this.

(*) 1k for most TTL, 10k for 74LS, look it up to be sure.

Keep in mind the 7474 family is a collection of D type positive edge triggered flip flops. They are already D type flip flops and each package contains two flip flops. With that in mind and with the information mentioned that tying all unused inputs to Vcc or Ground is a good idea remember if you are working with half of a package the rule about unused inputs applies to both halves. Left floating the chip can begin to oscillate and get hot.

If you want to get cool about it, driving the chip with an Arduino and using the code sample provided by Mark change things a little:

void loop ()
{
  digitalWrite (pin, HIGH) ;
  delay (100) ;
  digitalWrite (pin, LOW) ;
  delay (900) ;
}

Now we only have a 10% duty cycle but since the 7474 is only positive edge triggered it doesn’t care the clock goes low it won’t change states till the next positive going clock. Watch input clock on scope and the Q output and you have a divide by two. Start cascading the individual D flip flops. Using a pair of chips you get four D flip flops and now you can make a 4 bit counter.

Years ago, many years ago, more than I care to remember I used that chip and the 4000 series CMOS version the 4013 in dozens of circuits. :slight_smile:

Ron

I'll bet there is no bypass capacitor on VCC.

MarkT:
An Arduino pin makes a much better behaved signal to feed to a clock input, for instance one pulse per second:

Regarding the remark "Never connect TTL inputs directly to the 5V rail, they are not designed to handle this." does that also apply when feeding in a clock signal using an arduino "blinking" sketch ?

If the arduino puts out a logic high, does that need to go into the CLK pin via a resistor, or can I hookup the arduino pin directly to the clock pin.

ddewaele:
Regarding the remark "Never connect TTL inputs directly to the 5V rail, they are not designed to handle this." does that also apply when feeding in a clock signal using an arduino "blinking" sketch ?

If the arduino puts out a logic high, does that need to go into the CLK pin via a resistor, or can I hookup the arduino pin directly to the clock pin.

Yes, CMOS cannot directly drive TTL safely (you will get away with it, but any small spikes on the +5V can
zap the TTL gate - its a time-bomb in a commercial product for instance), you ideally need some sort of
interface circuit, the simplest being 1k in parallel with a Schottky diode - the diode pulls the TTL input
down, the resistor pulls it up. The diode should be Schottky to ensure good noise immunity in the LOW
state as TTL threshold voltages are so low.

Messing about on a breadboard you don't need to bother with such precautions really, but make sure
that 5V rail is well decoupled and definitely not above 5V (most USB sources give slightly less than 5V in fact)