# decoupling capacitors (sorry, I know its a tired topic)

I can see by googling that the topic of decoupling caps is one that confuses lots of newbies like me, and lots of experienced EE types are a bit fed up with explaining it to idiots. So I'm kind of cringeing as I type this, because I still don't quite get it -- not so much the concept, which I'll try to regurgitate in the hope of correction if I've got it wrong, but the actual practise, as in "how to choose cap type and value properly."

As I understand it, you put a cap between a voltage input (power rail, vcc pin on a chip) and ground for two reasons.

1. it acts kind of like a reservoir for current, so that if the load makes a sudden demand, it can draw on the capacitor's charge immediately, which for some obscure physics reason (which I take on faith) is faster to respond than the main power supply [figuratively] miles away. While I realise that hydraulic metaphors for electricity are suspect, I still tend to imagine this as like the reservoir tank on a well pump: the house plumbing draws on the reservoir tank for immediate water pressure, and only when the tank has lost pressure does the big pump fire up, thus minimising wear&tear on the big pump. So, many ICs have a requirement for little caps between their vcc and ground. I find they are built-in on many breakout boards. All this is starting to make sense to me.

2. at the same time, the "reservoir" effect tends to absorb/damp noise on the vcc line. Again I reach reflexively for the hydraulic metaphor: if I draw my water from a reservoir, any pulses or freshets affecting the inflow to the reservoir don't affect pressure at my pickoff pipe. The reservoir provides a buffer between fluctuations on its input, and the desired steady output. And that's how I imagine a capacitor filtering noise on voltage fed to an IC pin.

So far so good.

Now for my immediate problem. I have a linear pot (just your average cheapie) attached to an analog pin on a Leonardo. The pot value is displayed on a cheap 7 seg display. All of this works fine. However, as I raise the pot value (actually lowering the resistance, to increase the voltage on the analog pin which reads 0 to 1023), I2C communication failures become more common until, at the far end of pot travel, the I2C bus simply stops working. So the more current the pot draws, the more problems I see.

The pot seems to be quite noisy, i.e., the value I see on the display is jittery. So I'm guessing that the jittery pot is placing a fluctuating (noisy) load on my vcc, and that noise could affect the entire Leo. I tried using my mini scope (xminilab) to look at +5, but I don't understand its operation solidly enough to be sure of my results: it did look to me like there was more noise on vcc when I turned the pot. But vcc looked kind of noisy generally. Probably it shouldn't be that noisy, but everything seems to work OK so long as that pot isn't cranked up.

I should mention that the Leo in question is powered by a 9v input (wall wart) of 2A capacity, shared with another Leo. The afflicted Leo is powered off the VIN of the one connected to the wall wart. Their grounds are of course common.

So it seems like I should provide my Leo with a capacitor on its vcc, to protect it from noise on the 5v rail. If I'm understanding what google turns up, this is probably a good idea generally. I woulda thought the 'duino would have one built-in, but looking at a schematic for a Leo I don't see one.

Now, having pretty much convinced myself I should add this capacitor, how do I choose the value? Since it would be decoupling the main power supply, should I just "pick a big one"? Is the value critical? I have googled for some time looking for "decoupling capacitor arduino vcc" and similar search strings but haven't yet found a recommended value. Can I do any harm to my project by adding a cap of the wrong value?

Also, how local does a capacitor have to be? Should I put one in parallel with the pot, rather than on the vcc rail? Or both? Wouldn't there be one inside the wall wart itself, as well? does anything bad happen if you start paralleling them? Or can you just stick caps all over between any hot pin and ground, as many as you like? Does the value you choose for cap A change the value you'd choose for cap B in another location?

I have 2 kits of potentiometers, the ceramic disc ones and the can-shaped ones (electrolytic?) -- I know the difference between mu, n and p (micro nano pico); so I can understand the value labels on them. I just don't know what value to pick and where to put it

Can someone give me a practical guideline (one that doesn't involve very complicated math, preferably)?

Tazling:
However, as I raise the pot value (actually lowering the resistance, to increase the voltage on the analog pin which reads 0 to 1023)

A potentiometer has three terminals ..... so saying 'raise the pot value' has no meaning in it unless you define what was actually 'raised'.

A circuit diagram to show what is being increased (eg. resistance between wiper and one of the terminals, or voltage across wiper and one of the terminals etc.) will help.

And indicate what the source of voltage is ..... so that you can figure out where you need to apply some filtering (capacitors). You could certainly try putting a relatively large capacitor across the main terminals of your potentiometer........ eg. 1000 microfarad. But make sure to get the polarity correct for polarised electrolytic capacitors.

A pot is normally connected between 5V and ground with the wiper connected to the input pin, effectively a variable voltage divider. Since the resistance from 5V to ground is constant the load on the power supply is also constant.

So there’s perhaps something odd going on in your circuit. How do you have your pot connected so that it can affect the power supply load…and why?

Steve

How do you have that thing wired?

I have a sneaking suspicion the answer is "wrong"; changing the voltage on an analog pin should not impact I2C, nor will the current through a pot with typical wiring for using a pot wired as an analog input change as the pot is adjusted.

many ICs have a requirement for little caps between their vcc and ground.

No not many, all.

Basically the actual value to use is not critical but the capacitor type is.
http://www.thebox.myzen.co.uk/Tutorial/De-coupling.html

Also, how local does a capacitor have to be

As close as physically possible and the component leads should be as short as possible. With surface mount capacitors they will be if you chip has power and ground on adjacent pins.

does anything bad happen if you start paralleling them?

You get more immunity from interference. However if you have a silly amount you could prevent some DC to DC converters starting up, but you need a big system to get so much.

The standard recommended value is 0.1uF for each chip with a 47uF on the supply rail for starters. Yes you might need more in the light of what is going on in the circuit, that is what sort of current is being switched. The more current the more decoupling you need.

As to your pot problem, you have simply wired it up wrong. Post a schematic and a photograph and we will tell you where.

Your pot should be wired like this, if not you may have the wiper to the GND rail shorting the PS.

Your "cheap 7-segment display" is probably the main culprit for noise on the supply, and its driver
chip(s) need lots of decoupling, much more than a typical logic chip, due to the total current being
switched being high for many segments (20mA per segment, 7 segments per digit, several digits...).

Try 22uF or more, split amonst its drivers, and the noise you see on the pot will probably
decrease.

Adding 100nF to the analog pin itself will have a big effect too.

As usual I am overwhelmed by the quickness, civility and usefulness of the answers to my often somewhat stupid questions... Arduino forum is a very nice group of people.

I'll verify the pot wiring. I think I did it as shown in the sketch (i.e. correctly) but it's always good to double check.

Meanwhile, I find MarkT's comment very interesting & (to me) novel. I had been assuming it was the pot resistance decrease that was causing a problem. But of course as the pot value increases -- as read by the analog pin -- the value displayed on the 7seg (which shows a percentage of 1023 counts, from 0 to 99 pct) also goes from 1 digit to 2 digits, and from numbers like 1 and 2 up to numbers like 8...

It is a bog-standard Chinese TM1637 breakout using 2 pins for CLK and DIO, plus vcc and gnd. I am using pin 14 for CLK and 15 for DIO; I am not sure what tiny SMD capacitors may be attached to the driver chips on the breakout. I admit I usually treat breakout boards as black boxes; if they interact as described on their pinouts, I don't look closely at the innards. But I am interested to hear that 7seg displays can be inherently noisy.

Should I attach one or more capacitors to CLK/DIO/vcc at the breakout board?

It sounds like it's time to buy a proper instrument to see what's really going on with the 5V supply. Without the ability to measure, you are fumbling in the dark.

CLK and DIO are digital data pins. You would not normally put a decoupling cap on those lines. If you do, you will interfere with the digital communication. The sharp square-wave edges will be rounded off by the capacitor and you will be overloading the pins that aren't meant to drive large capacitative loads anyway.

You can use caps and resistors on long-distance digital communication lines, to match the impedance of the input or output pin to the cable's characteristic impedance. That's usually not a problem until you get to 10m (30ft) or thereabouts. (The actual length depends on the frequency of the signal. The motherboard wires in your 3GHz computer must have this impedance matching.)

How big is this LED display? You may simply be overloading the power supply's ability to provide amps.

Something slow like serial can probably handle 10m at 115200 baud or below, but something like SPI would not
be suitable for sending more than a foot or two without proper attention to impedance issues, since a
very typical problem is double-clocking due to reflections and impedance mismatches, and SPI
chips typically can clock pretty fast and multiple pulses will cause malfunction.

For high speed signals over cables its very useful to be able to monitor the signals with a good 'scope to
see how bad any problems are.

MorganS:
It sounds like it's time to buy a proper instrument to see what's really going on with the 5V supply. Without the ability to measure, you are fumbling in the dark.

agreed, and I'm trying to up my game as far as oscilloscope skills -- i.e. from nearly zero to basic I bought a 1ch Nano v3 to learn on, and have a Gratten small 2ch bench scope on order.

How big is this LED display? You may simply be overloading the power supply's ability to provide amps.

It's 4 7seg digits, of which 2 are used and 2 stay dark. My 2 Leonardos are powered off a 2A 9v wall wart so I would think there should be plenty of power available. When life allows me some uninterrupted tinker-time I will put a scope on various points (vcc, sda, scl, etc) and twist that pot knob and see what happens.

How big? 12mm digits? 25mm digits? Add up the total milliamps used when the maximum number of segments are switched on.

2A 9V is pretty much perfect. You would not expect problems with that but a weak connection somewhere may be bringing you down.

Draw out your entire schematic. "I think I did it right" isn't good enough. Use a multimeter to verify that the things you want to be connected are actually connected, and nothing is accidentally connected that you want to be not connected. Also use it to measure the current consumption of the pot as you rotate it. If you really did connect it like outsider's diagram, the current consumption will not change. If it does change, you messed something up.