documentation of SAMD21 interrupt system

I have an ISR which is invoked by TCC1 overflow that executes at 1.6kHz and runs at priority 1, and I've measured that it consumes 5% - 11% of processor time, i.e. 36 - 66uS to execute on each interrupt, including instrumentation digitalWrite calls. Being unfamiliar with the SAMD21 interrupt system, I picked values and coded naively just to see what would happen, and I haven't observed any issues so far. But still, 5% - 11% seems enormous to me.

My foreground code uses Wire, WiFi101, and Serial1, so I assume that means I'm using the SAMD21 I2C, SPI, and USART hardware. Where in the datasheet do I look to understand how (or if) these services are being blocked while my ISR is running, and if I run the risk of dropping data? I can't find a detailed description of the NVIC vis-a-vis these services in either the SAMD21 datasheet or the Cortex-M0+ Technical Reference Manual, so I suspect I'm looking in the wrong place.

In case anyone else was wondering too, this looks promising: SAM D21 Exceptions and Interrupts - Developer Help. You also have to poke through the mkr1000 variants.cpp/h files as well as the relevant source code in the cores directory.