From what I've gathered is power gating used in IC's to prevent leakage current. this is done by implementing a high-side PMOS en low-side NMOS MOSFET and switching them opposite of each other in the following manner:
How much would you gain from using this system on a separate circuit on the pcb which has to be switched off for low power applications. I am currently looking into a high-side switch as it is easier to switch the circuit this way. Would a low-side switch reduce leakage current? or is it not worth the headache?
it has a leakage current of 100 nA, which is good for my application. it can be used high-side and low-side and can be switched using a digital 3.3V signal.