Double check my H-Bridge schematic---Diode placement?

I am trying to get a 12V DC motor that draws 600 mA to work bidirectionally. I've attached a schematic I sketched up. But I'm really still just learning as I go along; I learned after creating this that this is called an H-bridge. So I'd appreciate a couple set of eyes on it. Specifically wondering about where to place flyback diodes. I read this post here: http://forum.arduino.cc/index.php?topic=50931.msg1252094 but couldn't understand all the discussion, in particular whether that was a bad design.

The transistors are:
P-channel LL FET: Intelligent Power and Sensing Technologies | onsemi
N-channel LL FET: http://www.nxp.com/documents/data_sheet/PSMN4R3-30PL.pdf
NPN BJT: Intelligent Power and Sensing Technologies | onsemi

Thanks for any illumination you can provide! Both in theory and in practice.

Each gate needs a control signal and driver all its own (yes, one for each.)

Your design has a serious flaw. It can (will) short out the power supply and possibly, burn up components. Google "h-bridge shoot through".

No, you do not need a separate control signal for each gate…

Driving the opposite gates this way will work. You do need pull down resistors for the N-channel mosfets. Also the P-Channel mosfets are going to discharge through the pullup 10k resistor, this will be quite slow. You can reduce this a much lower value.

This is similar to a motor driver circuit I use quite a bit.

This design will not shoot through, Look closely... the opposite gates are tied together.

edit: it WILL shoot through if you turn both inputs high for some reason. But not under normal use.

Also the n-channel mosfets are upside down in the schematic.
I put a motor driver up a couple weeks ago that uses the same type of design. Sorry the schematic is in DipTrace.

edit: it WILL shoot through if you turn both inputs high for some reason. But not under normal use.

It will ALSO shoot through if the on/off timing is not exact, and it never is unless there are separate drivers for each transistor, with an appropriate delay mechanism.

jremington:
It will ALSO shoot through if the on/off timing is not exact, and it never is unless there are separate drivers for each transistor, with an appropriate delay mechanism.

Ummm, NO it wont.. Think about it.... with one channel low, the top gate will be off on one side as will the bottom gate off on the opposite side. You can do whatever you want to the other two gates but how can you possibly create a shoot through?

Unless you turn on both channels high.

As Runaway Pancake said above, "here we go again"!

You can learn from the professionals here, among many other places.

Hmm, professionals or not, this design does not shoot through. You can determine that from the schematic.

You will get it if you stare at it long enough. I am serious here, I have made many bridges and many have this same layout. The only time you can possibly have shoot through is the moment when you change DIRECTION (so don't do that more that a few hundred times per second).

I know it looks similar to many designs that drive the gates on one side with one signal but this is not the same.

Thanks for the answers. Sorry if I brought up a common cause for disagreement! I can easily modify it so that the two N-channel FETs get their own input signals. I don't understand why that helps solve the timing problem however. I'm afraid I don't understand the info at that link at all. Why can't you just enforce timing limitations on the pairs of gates? In practice what timescale is this about also? Looking at the capacitance of the FETs it seems like on the order of 20 microseconds even with the 10K resistor? I'll only need to switch directions on the scale of .1 seconds max.

No we don't, this is a valid circuit topology. Each input controls diagonally opposite switches - you only
have to ensure enough deadtime when changing direction.

The common mistake of wiring the switches on the same side of the bridge with common gates
is what you are confusing this with.

However the circuit is drawn wrong (The n-FETs are upside down, the n-FET gates need to be connected
before the base-current-limit resistors, not after, since they need 5V). The p-FETs need not and should not
be logic level if the supply is 12V. The proposed p-FETs have a gate-source voltage limit of +/-8V and will
fry.

The bridge isn't suitable for PWM with the large 10k gate drive resistors. Change R3 and R4 to 560 ohm
0.5W resistors for reasonable switching speeds (low frequency PWM).

[ Did I miss anything? ]
[ Oh yes, lack of decoupling on the 12V rail - it is a very good idea to have decoupling. ]

Its not really a cause for disagreement.

There are many designs that tie the gates on one side together in a push/ pull configuration. This creates a period of time ( an overlap) where the gates of both the mosfets are turned on. You need to know the rise fall times of the mosfets and work out the charge discharge times of the gates to make sure that this doesn't happen. Gate drivers are an easy way to achieve this.

However, your schematic does not have this type of arrangement. As you tie the gate from one high side to the low opposite side. When the gate signal is low both of those mosfets will not be conducting. These gates are held low continuously while pwm is applied on the other channel ( the other diagonal gates).
The downside is you are switching both high and low side but the upside is it take away the shoot through problem of the other arrangement.

And to answer the question: no you don't need freewheel diodes, the MOSFET body diodes fulfill that
function in any MOSFET H-bridge.

It must be confusing asking a question and get so very different answers. Take Marks and my suggestions and try them out.

That's an important point about the p-channel fets.. these aren't suitable. It's a show stopper!

MarkT:
The common mistake of wiring the switches on the same side of the bridge with common gates
is what you are confusing this with.

I'm not confusing anything.

  1. Q1 and Q5 are shown wrong, they're upside-down.
  2. Each N-channel Gate is tied to an NPN base; so, as shown, that will switch between 0 ("floating") and 0.7V
    Happy building.
  1. I just said that.
  2. I just said that.

I spotted several important mistakes in the circuit on my first post, I also correctly spotted
the topology was not a problem for shoot-through. That counts as efficiently answering the
posting. Trust me I've built a fair few H-bridges and I can read circuit diagrams.

Great, thanks. So a P-channel FET like this: https://www.sparkfun.com/datasheets/Components/General/FQP27P06.pdf would be suitable? (Max gate-source voltage of 20 V and threshold voltage of 4 V.

Made the changes. Added a decoupling capacitor, switched the position of the N-channel FET base, and added pull down resistors for the N-channel FETs. Will the NPN still be able to draw enough current with these in place?

Also fixed the direction of the FETs. I'm confused about the terminology though. Source and drain refer to holes for P-channel and electrons for N-channel rather than conventional current?

Better now?

Could Team 4-drivers explain why this topology with suitable delay between switching will not work, in simpler terms than the previous link? I am curious.

mahnamahna:
Better now?

I would put a gate resistor of say 330 ohms before each n-fet gate too.(To limit the current at the arduino pin).

Unless you really are low on pins I definitely wouldn't be using tx /rx pins from the arduino! Use any of the pwm pins.

A bigger capacitor may be needed, depends on load and noise.

Last thing is you should use higher resistance on your n-fet pulldowns(not pullups). These aren't for discharging the gate. They keep the gates from floating. 10k there would be reasonable.

That mosfet should be suitable.

mahnamahna:
Could Team 4-drivers explain why this topology with suitable delay between switching will not work, in simpler terms than the previous link? I am curious.

If you mean the link from post 7. That link does not describe this topology at all.
With a small delay only when changing direction this is a very safe type of motor control circuit.

taken from that link " For instance, when the HS FET is commanded on and the LS FET is commanded off, logic propagation delay and the time required for charging or discharging the FETs’ gate capacitances can cause a short period when the HS FET is half on and the LS FET is half off."

The ONLY time your bridge makes this behavior is when switching direction. A delay between driving forward and backward by a fraction of a second solves this. Did you check out that post where I have a motor driver using this configuration? Even has videos of it in action!