I found another arduino.cc forum post by CrossRoads offering similar advice re. buffering:
CrossRoads:
What size (gage) wire are you using for +5 and Gnd? If it's too small, you may have dips on the supply line and voltage surges on the Gnd line as the TPIC outputs turn on and pull the pins low.
How many buffer chips do you have? I daisychained 45 TPIC6B595, with a buffer chip for the signals for every 9 chips.
So, from what I can gather I should buffer clock and latch lines every xx shift registers (data is essentially buffered at every shift register). I still don't understand the layout or ratio of buffers to shift registers.
Is the Arduino driving one clock / latch signal directly into the first 9 daisy chained shift registers and then after that the 74HC125 buffers clock and latch on two of its inputs/outputs to another 9 x TPIC6C595's and the other two inputs/outputs on the same 74HC125 go to another 9 x TPIC6C595's ? This would mean 1 x 74HC125 would handle buffering for 18 x TPIC6C595's. This is a different ratio of buffer to shift registers recommended in this thread.
Or are the clock / latch pins running into 5 parallel 74HC125 IC's and then the buffered output going into 9 parallel shift registers with the data line going serially between them all ?
Or... is the one 74HC125 buffering the clock, latch and data so that data has the same buffering timing lag (10ns I think) as the clock and latch. This would leave one buffer input/output unused on each 74HC125. And then 5 x 74HC125 buffers with 9 x TPIC6C595's each gives the 45 TPIC6C595's and 360 outputs.