You have the Enable Oscillator bit cleared?
Control Register (0Eh/8Eh)
Bit 7: Enable Oscillator (EOSC). When set to logic 0,
the oscillator is started. When set to logic 1, the oscillator
is stopped when the DS3234 switches to battery
power. This bit is clear (logic 0) when power is first
applied. When the DS3234 is powered by VCC, the
oscillator is always on regardless of the status of the
EOSC bit. When EOSC is disabled, all register data is
You have the Interrupt Control bit set correctly?
Bit 2: Interrupt Control (INTCN). This bit controls the
INT/SQW signal. When the INTCN bit is set to logic 0, a
square wave is output on the INT/SQW pin. When the
INTCN bit is set to logic 1, a match between the timekeeping
registers and either of the alarm registers activates
the INT/SQW (if the alarm is also enabled). The
corresponding alarm flag is always set regardless of
the state of the INTCN bit. The INTCN bit is set to logic
1 when power is first applied.
You have a pullup resistor on the Interrupt line?
Active-Low Interrupt or Square-Wave Output. This open-drain pin requires an external pullup resistor.
You are leaving Vcc open?
Power-Fail Voltage VPF min 2.45 typ 2.575 max 2.70 V
The power control function is provided by a temperature-
compensated voltage reference and a comparator
circuit that monitors the VCC level. The device is fully
accessible and data can be written and read when VCC
is greater than VPF. However, when VCC falls below
both VPF and VBAT, the internal clock registers are
blocked from any access. If VPF is less than VBAT, the
device power is switched from VCC to VBAT when VCC
drops below VPF.