I am not particularly au fait with cloud storage etc but could they be stored somewhere like Mediafire or Google Drive If so cataloging them effectively might be problematic
If anyone has the time and inclination, would they mind casting and eye over this Eagle library that I did for the 8 x 8 LED common row matrix and let me know how I went. I included the data sheet for the pin spacing dimensions. As per Crossroads suggestion I printed it out at 1:1 and it does line up with the physical part OK. Thanks Pedro.
8 X 8 LED Matrix.lbr (7.92 KB)
Need more of the data sheet to know which pins the anodes and cathodes go to.
It is only a minimalist Ebay data sheet that I edited to make a little more legible. Thanks for taking a look.
The 2nd part was the missing part - anodes/cathodes pinout. If I remember I'll look when I get home from fencing class tonight.
Library looks good - I would add some names like R1, R2, C1, C2, or AN1, AN2, KA1, KA2, so you can tell what's being connected. Another thing - check the hole diameter used 0.7mm make sure its the right size for the pins.
Great. Thanks a lot for casting your "Eagle eye' over my library 8) Yes I checked the pin size when I picked the pads and I will look at the naming situation as well
Edit - You are right, the pin hole size in this version is 0.7 mm whereas luckily the later version that I have used in my project schematic and board files has a 0.8 mm hole
For my initial foray into learning to use Eagle, I am making a 60 mm 8 x 8 LED matrix version of marco_c’s Parola boards. As this is my first attempt, would someone be kind enough to have a quick look at my design and point out any mistakes I might have made. I am confident with the basic circuit and have tested that everything is connected as required.
I connected all the ground connections together before I realised anything about ground planes and am wondering, if it is a problem if I just leave this as is. Also as far as DRC does it look like the default settings will be OK for tracks widths, isolation and the myriad of other factors that I am still to learn about. I ran the seeed Fusion_eagle_rule_v1.1.dru and it found no errors.
I am proposing to use seeedstudio. After I generated the gerbers with Seeed_Gerber_Generater_2-layer, I looked at them in two different gerber viewers but the top silkscreen GTO file was not showing up. but everything else appeared OK to my untrained eye. What designates the perimeter of the board and do they cut the board to this shape – Is it dimension layer 20. I have attached the Eagle files and the gerbers.
Bigger Parola Gerbers.zip (24.3 KB)
Bigger Parola.silk (274 Bytes)
Bigger Parola.brd (114 KB)
Bigger Parola.sch (678 KB)
I would change a few things:
Grab all componts on the board, right-click & Smash Group.
put the names on things on layer 21, tplace, or 25, tnames.
Edit: Net Classes - make default at least 10 mil wide, 12 mil drill, 10 mil clearance
Edit:Net Classes - add power, make it thicker, as you are passing along +5 to multiple boards; 24 mil, 26 mil drill, 10 mil clearance
Add top & bottom layer polygons, Name them Gnd
Watch the right angles on traces - this can become weak spots during etching & prone to failure.
I ripped all the traces & let it autoroute after changing the net classes, came out like this.
Still a couple of right angles to fix. If there’s a way to say “No right angles traces” in the routing rules, I would use it. I don’t know if that is possible to set up.
Layer20 is the dimension, you set that up nicely.
Is the matrix tall enough for the max7219 to sit underneath it?
Same for the mounting holes - check that the plastic body of the matrix won’t interfere with screw heads, or nuts, whatever gets used there.
Bigger ParolaV1.brd (115 KB)
Bigger ParolaV1.sch (678 KB)
What do you have for a viewer? I use the free one at www.viewplot.com
Does seeed have a .cam file that defines what goes in the different gerber files? iteadstudio does, I use it and have never had an issue.
One more thing - on the schematic, I use the “label” button (marked ‘abc’ ) and name all the signals.
Then when you are running the error checking, or routing, or reviewinmg the autorouting, and you click on a signal you will see a real name and not just N$16 for example. Seeing “DIN” is much more meaningful.
Thanks so much for looking over my board and improving it - it looks fantastic XD I will definitely look at all your suggestions and improvements to incorporate in my future boards. I am using female header strips for the matrix to plug into and there is ample clearance for the 7219 but as for the mounting holes, I will have to mount the board and then plug in the matrix. I was trying for a small footprint and I only moved the bottom of the board outline down 2 mm from the lower matrix edge so the lowest trace on the top layer of the board would not be too close to the edge. I also used viewplot on my initial board but for some reason the silkscreen was not showing up but your version shows it perfectly, so obviously I had the layers set up incorrectly. I ran the seeed camfile but it generated a different set of gerbers than what they require on their site. There again probably operator error - so much to digest. I might then have a look at Iteadstudio and see how I go there.Thanks again CR as always I appreciate your help Pedro.
[u]Edit[/u] – If when I run the Iteadstudio DRC should I be concerned with the 48 errors. There are stop mask errors around the IC and the two 5 pin data/ power connectors and width errors with the top and bottom ground planes. Do I need to address these issues. Also on their website here they specify which cam files they need but when I run their cam file generator it does not produce the GKO outline layer file. Thanks.
If you can clearly see all your Reference Designators and they don't interfere with the parts outlines, then don't worry about the stop mask errors. Most are concerned with headers. The two Width errors are from the ground polygon outside of the board dimension, also not a concern.
For iteadstudio, I run their .cam file and then send them the 13 files that are created. They have never complained to me about that.
That's great. I just preferred to check before I commit to a potential disaster. Now I will see what you changed on my original board so I can learn from your advice 8)
I put my order in at Iteadstudio so I am now looking forward to receiving my first boards before Christmas. It's like expecting a baby :D Thanks Crossroads for all your help Pedro
I have been having a look at the brd and sch files that you kindly modified for me Crossroads and just a few quick queries if I may. I am clear on the ground planes, but with regards to the net classes. In the schematic editor when I look at the default track width in net classes it is 10 mil but if I check properties of any trace, while still in the schematic editor it shows a 6 mil width. However when I check the properties of the traces in the board editor, the width is set at the 10 mil default and the power traces to the 24 mil you set up in the power settings of the net classes. What am I not understanding here, thanks Pedro.
I received my boards back from Iteadstudio today. After I assembled the first one and uploaded some code to it I heaved a sigh of relief as it worked perfectly XD I have got eleven boards in total so when I have finished it should make quite an impressive display at 60 mm wide and 660 mm long. Thanks again Crossroads as usual your encouragement, help and advice is greatly appreciated. I will post a video once I have it all assembled in a nice enclosure with it’s own standalone Arduino board incorporated.
I know, I am just a video fiend at heart. I just couldn't resist posting this snippet until I receive the rest of my matrices