ESP 32 WROOM not working on Battery Power

I am facing an issue wih powering ESP-32 Wroom on LP103454 3.7V 2000mAh Battery. ESP-32 is accompainted with LORA 433 MHZ module. Both are working fine with 5V USB power, Once I remove the USB power within a few seconds the board is dead. I hv fully charged the battery showing 4.17 V and at esp32 POWER pin Voltage is 3.29V. Appreciate, if some expert in the group advice how to get board working on Battery power.

Please make schematics showing the entire powering of the build.

What does the ESP specifications say about input voltage for the pin where You connect the battery ?

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I am using ESP32-Wroom-32UE chip. Voltage with charging plugged-in or Battery plugged-in is reading same as 3.29 V at pin 3V3 of of ESP32.

Where is the battery and where is the USB 5 volt? Your post make it sound like both are connected at the same time and then You disconnect the USB power.

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here is the image for Battery and 5V input through USB.

What about the second line in reply #2?

Please don't jump questions if You want support.

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How about the complete schematic.

If you must use a higher-impedance divider/sensor, either add a small cap (≈0.1 µF) at the pin or buffer the signal. The ADC has a tiny sample/hold cap that must charge during a very short sampling window. With a 1–1.5 MΩ source it won’t settle, big, jittery errors. (It will “work” but readings wander, especially after channel switches or fast sampling.

Here are the official Espressif docs you’ll want:

ESP32 Hardware Design Guidelines (ADC section) – shows ADC pin mapping and the note to “add a 0.1 µF filter capacitor … when using the ADC” for better accuracy.
Espressif Documentation

ESP-FAQ: ADC explicitly states the ESP32 SAR-ADC sample-and-hold capacitance is ~1 pF (useful for source-impedance/sampling-settling).
Espressif Documentation

ESP32-WROOM-32E/32UE Datasheet – module datasheet with ADC characteristics and pin names (AIN0 = ADC1_CH0 on SENSOR_VP/GPIO36).
Espressif

ESP32 Technical Reference Manual – deep dive on the SAR-ADC block (architecture/timing).