If we look in uart.c, which I think I'm correct in saying lives in the ESP-IDF API layer underlying the Arduino-esp32 API, we find functions like:
esp_err_t uart_get_buffered_data_len(uart_port_t uart_num, size_t *size)
{
ESP_RETURN_ON_FALSE((uart_num < UART_NUM_MAX), ESP_FAIL, UART_TAG, "uart_num error");
ESP_RETURN_ON_FALSE((p_uart_obj[uart_num]), ESP_FAIL, UART_TAG, "uart driver error");
UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
*size = p_uart_obj[uart_num]->rx_buffered_len;
UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
return ESP_OK;
}
Is this function, and the ones that accompany it, accessing a ring buffer or the actual UART FIFO RX buffer?
I've made a number of assumptions in asking this question, and I apologise for my naivety. However, I'd be extremely grateful for clarification on a number of basic matters.
- Is the UART FIFO buffer a "normal" linear buffer of fixed length? (I believe it is.)
- Is the UART FIFO memory that exists in the UART chip rather than in the ESP32's RAM or flash memory? (I understand that the ESP is a SoC, so it's all one chip, but...)
- Does FreeRTOS implement its own ring buffer "on top of" the UART FIFO buffer? (I think it does.)
- Why have a ring buffer and a UART FIFO buffer in the first place?
- When does FreeRTOS copy data from the UART FIFO buffer to the ring buffer? Based on what sort of criteria?
Many thanks.