I needed to use the Ethernet shield for a specific project so i tried to modify its form factor.
On the act of redesigning (Eagle) it i kept all things related with Ethernet and threw out the SDcard related stuff
I sent the new board for production and assembled it, now that i´m testing it i´m having trouble in putting it to work.
I will continue to run more software tests, for now i just send the schematics so everyone can check them and see if there might be some stupid hardware mistake.
The decoupling and traces for the 1V8 supply seem iffy - decoupling needs to be close to the relevant pins, and traces ought to be low inductance to allow decoupling caps to decouple effectively - all the 1V8 traces are minimum width / max inductance. Its often easiest to
place decoupling caps on the reverse of the board under the chip. For a chip like this I'd assume 4 or 5 0805 sized decoupling caps so
every power/ground pin has only a few mm to the nearest cap - best practice, then no need to worry about decoupling issues.
I presume the two regulators in the schematic are alternative foot prints?
The RJ45 signal connector (not the ethernet one) seems odd - no ground wires? How can that work? Also if using RJ45 cable you
should only send upto 4 signal/ground pairs as its four twisted pairs, not 8 straight wires.
In the case of the 1V8 source, there isn´t decoupling because there was none on the original arduino ethernet shield, i thought that it wouldn´t be needed.
Don´t forget that i copied the schematics completely for the ethernet redesign.
Maybe i can improve the trace distance between pins and read the datasheet of W5100 to improve decoupling.
The 3V3 source has some decoupling capacitors i can try to improve their placement.
The two regulators in the schematic are the same sugested and used in the original arduino ethernet shield (i copied).
The RJ45 connector is just a connector that brings the SPI pins to this ethernet board from another board, and the GND reference comes from the power source. As i´m writting this i just realize that this just might be the problem, the SPI bus. I know that SPI is a PCB bus, but separating the boards was the only way to make my design work.... I will have to try to use the shortest possible cabling between boards, and maybe slowdown comunication droping the SCK frequency.
Do you think droping SCK frequency in the Ethernet libraries will affect their correct functioning?
I will try to add some ground pins in the connector this might help a little bit...
In the case of the 1V8 source, there isn´t decoupling because there was none on the original arduino ethernet shield, i thought that it wouldn´t be needed.
That's not good. The W5100 datasheet shows more than 10uF of bypass each for +1V8 and +1V8A, and the internal regulators in most chips are usually of a type that requires some external capacitance...
I wonder if the official ethernet shields are missing this as well, or whether it's an error in the "reference" schematic?
Well it may just be luck that it works... Decoupling is never optional in high speed logic (although chips incorporate on-chip decoupling, its hard
to provide enough capacitance given the constraints of the die size).
[ oh yes, keep SPI cable to 15cm or less and you must run ground wire in same cable ]
I made some more tests, and it seems that the size of the cabling was the problem.
At the moment this design is working.
Strangely not following the rules from the W5100 reference schematics.
Anyway i´m going to add the modifications of running ground lines with the wiring and adding some more capacitors for decoupling.
