It's not a problem to connect two linear regulators in parallel (of the same voltage!) Theoretically one will be just slightly higher than the other (due to manufacturing variations) and will supply all the current while the other will supply no current. In practice, due to resistance of PCB traces and such, there will be some current split between them.
No. The +3.3V supply coming from the Duemilanoves and earlier boards came directly from the FT232 device and was limited to only 50mA, not protected, etc. so it's best to not even count on it being there. If anything I'd recommend a design technique that uses a single regulator on the shield itself, derived from the 5V supply.
On the Uno's you have a proper 3.3V regulator so you could ask it to share the load current by playing tricks with resistance, but why solve a problem that doesn't exist?
The Aussie Shield: breakout all 28 pins to quick-connect terminals
Changing subject, by the way can you explain me why in the ethernet shield there is an inverter to enable the SPI interface ony when it is selected, i.e. when SS is low?
In other words, why SEN is not just pullupped?
I am not sure but I have a feeling that the WizNET chip does not "play nice" like other SPI chips do. They are supposed to hold the MISO line floating when not selected but I seem to remember that this chip does not and always drives it either high or low, thus conflicting with any other SPI devices you may have hooked up.