External Memory with an Arduino Mega / Atmel 1280?
Has anyone out there had much success working with external memory using the Arduino Mega / Atmel 1280 mcu? I recently upgraded to the ArduinoMega with expectations that I could “easily” access a bank of external SRAM but have had mixed results.
The only references I could locate were for the earlier, smaller arduino chips so I though I would try here.
I have my Atmtel 1280 memory map configured as follows:
0x0000 - 0x21FF - Internal memory for the Atmel 1280
0x2200 - 0x7FFF - N/A (no connection on the external bus)
0x8000 – 0xFFFF – 32K of 70ns SRAM
My code enables the external memory using the single memory model mode and then configures the external memory for 2 wait states for read and write plus 1 wait state between address changes.
XMCRA = B10001111;
//
// 7 - SRE 1 = ENABLE EXTERNAL MEMORY
// 6 - SRL2 0
// 5 - SRL1 0
// 4 - SRL0 0 = 000 = Lower Sector = N/A, Upper Sector = 0x2200 - 0xFFF
// 3 - SRW11 1
// 2 - SWR10 1 = 11 = Upper Sector Wait 2 cycles during read/write and wait one cycle before driving out new address
// 1 - SWR01 1
// 2 - SWR00 1 = 11 = Lower Sector Wait 2 cycles during read/write and wait one cycle before driving out new address
XMCRB = B00000000;
//
// 7 - XMBK 0 = DISABLE EXTERNAL MEMORY BUS-KEEPER
// 6 - RESERVED 0
// 5 - RESERVED 0
// 4 - RESERVED 0
// 3 - RESERVED 0
// 2 - XMM2 0
// 1 - XMM1 0
// 0 - XMM0 0 = 000 = EXTERNAL MEMORY HIGH MASK (000 = NONE = 8 BITS = FULL 56KB ADDRESS SPACE)
My hardware is configured as:
PAD0-7 split into A0-A7 and D0-D7 with an 74HCT573 using PG2 (ALE – Address Latch Enable to external memory) as described in the atmel280 doc sheet.
PC0-7 are dedicated A8-A15
PG0 = /WR strobe to external memory (write)
PG1 = /RD strobe to external memory (read)
PG2 = ALE address latch enable to external memory (latches LSB address A0-A7)
For the record, I am inverting the A15 signal to generate /A15 which controls the /CS on my SRAM. This ensures it is only accessible when the external address buss is 0x8000 through 0xFFFF.
I have tried accessing the external memory with both C and ASM.
At best my results could be described as intermittent. My SRAM should be able to run with zero wait states but results vary even with the maximum wait stats enabled. I have tried swapping the 74HCT573 with a 74LS373 but there ws no increase in reliability. I have swapped the SRAM chip and even exercised it on another system and it passed diagnostics.
Another question in general about the atmel 1280 design, does the chip set the external address bus lines even when accessing the internal memory in the first 0x2200 block of memory? On an old 8 bit cpu, the address lines were always active but I was curious about the atmel philosophy being 25+ years newer.
So, I'm looking for any proven designs or code to work with. I suspect a timing issues is involved but maybe I have simply overlooked something. Any suggestions or pointers to better docs would greatly be appreciated!
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