you are correct that there is a 100nF cap in the mix. but it is necessary for the reset pulse to be generated by the usb to serial converter.
the presence of the two external pull up resistors in parallel should not affect the timing nor should they prevent the line being pulled low by the reset pulse.
more interesting is that this has reminded me of the debug wire interface and the ability to debug via spi (for which the cap would need to be removed). that's worth looking at as an alternative solution.