Fluctuating resistance in digital pot

Vss and Vdd are correctly wired.

I've read up on decoupling capacitors and my (probably over simplified) understanding is that the cap will act to smooth out voltage changes in the arduino's 5v regulated power caused by the changing power demands of the arduino itself.

The caps need to be placed as close to the digital pots power/gnd pins as possible.

The recommended sizes seem to be 0.1uf and 10nf. smaller caps can react quicker, thus the 10nf, larger caps can act longer, thus the 0.1uf.

I only have on hand 1uf and 10nf. I don't believe the large cap will harm anything (correct?), but will it be too large?