I added FPGA.digitalwrites with no delays to the VidorTestSketch loop to see how fast the FPGA can toggle it’s pins and got 675Hz on my scope. Somewhat short of the 150Mhz stated on the store page. I am sure it can do this but how to get it to do so is the question.
Is this because the SAMD21 is telling the FPGA to do this every loop? I put in a two delay(1) and it goes to 500hz as expected.