I am confused about the connection between the DTR pin and the reset pin. With the capacitor in series, it can be seen that when the DTR pin gets from high to low, then there is a pulse experienced from high to low and then low to high in a short amount of time. I am confused that during the upload is the pulse given only once and the code is uploaded? Or the reset pin stays low during the complete upload. But if that is the case then how is this possible with a capacitor in series? Kindly help me understand the working as the simulation just says that we get only small pulses as shown:
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Only a pulse is generated. THat resets the AVR, which then enters the bootloader and uploads the sketch. The bootloader is normal AVR code, so it has to run with RESET high ("chip NOT reset.".)
RESET would stay low for ISP programming, but that isn't what happens here.
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