Considering the following circuit.
It is my understanding that R1 is most significant in frequency applications (due to Gate capacitance C1)
For very low frequency applications (less than 1hz) it limits the current flow to and from the gate.
As the PCF8574 has limited drive capabilities (4ma), I have chosen a value of 1.5kΩ.
R=E/I R= 5v/4ma = 1250Ω
AM I INCORRECT? (you may now proceed with the slings and arrows)
1.5K is a reasonable choice for 4 mA maximum instantaneous drive, but the manufacturer of the PCF8574 recommends 1 mA maximum (presumably steady state).
Would it also be true that the sole purpose of R2 is to bleed off gate charge should the input be left floating? (a three state driving device)
NO!
A floating gate means the gate pin is left unconnected, or its voltage is not firmly controlled.
I don't think OP's question was about whether the input should be left floating, it was about whether the sole purpose of R2 is to drain the gate-source capacitor if/when the input is left floating.
I have seen many examples both ways. I do not think it makes a discernible difference.
In my configuration instance the gate is looking at 100k to ground and the input is seeing 101.5k to ground.
In your configuration instance the gate is looking at 101.5k to ground and the input is seeing 100k to ground.
Am I missing something?
Apparently. The "wrong" way is a voltage divider that lowers the gate drive voltage. In many cases, correcting that error may not make a discernible difference in performance.
Have fun!
See your other post on the same topic for the answer:
P type Mosfet and PCF8574?
Yes. It's really only intended for sinking.
The diagram is misleading in that it suggests that Ioh can only be 100uA
The ports are quasi-bidirectional
As usual.
