Generate 250 kHz on timer interrupt ?

Official Hardware Mega GIGA R1 WiFi
1

Hello everybody.
I have a project on DUE that work fine and I have to convert it on GIGA (M7) for use M7 with more powerfull and use M4 at secondary functions.
On DUE I produce 250 kHz signal by using timer4 with a library that i found. With that I could produce an interrupt from 48 nS to 3.1mS (320Hz to 21Mhz) with a fine step (48ns)

On GIGA with "Portenta_H7_TimerInterrupt.h", I can only produc a 100 kHz signal inperrupt with a 1µs step. I can't use it

Please do you known if existe a issue for me on GIGA ?

Part of code on DUE :


/*
  Created by Ivan Seidel Gomes, March, 2013.
  Modified by Philipp Klaus, June 2013.
//  TIMER_CLOCK1: MCK/2   = 42 MhZ,  period 1 = 48 ns,  period 0xffff = 3.1 ms, 320 Hz - 21.0 MHz
//  TIMER_CLOCK2: MCK/8   = 10.5 MhZ,period 1 = 190 ns, period 0xffff = 12 ms,   80 Hz -  5.3 MHz
//  TIMER_CLOCK3: MCK/32  = 2.6 MhZ, period 1 = 762 ns, period 0xffff = 50 ms,   20 Hz -  1.3 MHz
//  TIMER_CLOCK4: MCK/128 = 656 khZ, period 1 = 3.0 us, period 0xffff = 200 ms,   5 Hz -  328 kHz
*/

DueTimer& DueTimer::setFrequency(int frequency){
  // Set the timer frequency (in Hz)
  
  Timer t = Timers[timer];                          // Get current timer configuration

  uint32_t rc;
  
  // BLOC 1   //
  
  rc = VARIANT_MCK/2/frequency;                     // 2 --> TIMER_CLOCK1
  //rc = VARIANT_MCK/8/frequency;                     // 8 --> TIMER_CLOCK2
  //rc = VARIANT_MCK/32/frequency;                    // 32 --> TIMER_CLOCK3
  //rc = VARIANT_MCK/128/frequency;                   // 128 --> TIMER_CLOCK4
  
  pmc_set_writeprotect(false);                      // disable write protection
  pmc_enable_periph_clk((uint32_t)t.irq);           // Enable clock for the timer
                                                    // Set up the Timer PWM

  // BLOC 2   //
  
  TC_Configure(t.tc, t.channel, TC_CMR_WAVE | TC_CMR_WAVSEL_UP_RC | TC_CMR_TCCLKS_TIMER_CLOCK1);
  //TC_Configure(t.tc, t.channel, TC_CMR_WAVE | TC_CMR_WAVSEL_UP_RC | TC_CMR_TCCLKS_TIMER_CLOCK2);
  //TC_Configure(t.tc, t.channel, TC_CMR_WAVE | TC_CMR_WAVSEL_UP_RC | TC_CMR_TCCLKS_TIMER_CLOCK3);
  //TC_Configure(t.tc, t.channel, TC_CMR_WAVE | TC_CMR_WAVSEL_UP_RC | TC_CMR_TCCLKS_TIMER_CLOCK4);
  
  TC_SetRC(t.tc, t.channel, rc);                    // Reset counter / fire interrupt   
  t.tc->TC_CHANNEL[t.channel].TC_IER=TC_IER_CPCS;   // Enable the RC Compare Interrupt
  t.tc->TC_CHANNEL[t.channel].TC_IDR=~TC_IER_CPCS;  // disable all others.

  return *this;
}


extern int FREQUENCE;

void TC4_Handler(void) {
  pmc_set_writeprotect(false);
  uint32_t rc; 
  
  // BLOC 3   //
  
  rc = VARIANT_MCK/ 2 /FREQUENCE;     // CK1 48 ns,  period 0xffff = 3.1 ms, 320 Hz - 21.0 MHz
  //rc = VARIANT_MCK/ 8 /FREQUENCE;     // CK2 190 ns, period 0xffff = 12 ms,   80 Hz -  5.3 MHz
  //rc = VARIANT_MCK/ 32 /FREQUENCE;    // CK3 762 ns, period 0xffff = 50 ms,   20 Hz -  1.3 MHz
  //rc = VARIANT_MCK/ 128 /FREQUENCE;   // CK4 3.0 us, period 0xffff = 200 ms,   5 Hz -  328 kHz

  
  TC_SetRC(TC1,1, rc);
  TC_GetStatus(TC1, 1);
  DueTimer::callbacks[4]();
}
/*****************************************************************************************/