HDMI Sink?

Hi,

I wanted to ask if there is any technical (i.e. hardware) issue if I wanted to use the MKR 4000 as an HDMI sink, using the built-in HDMI connector?

Niko

Hi,

I'm also interested in this topic and I hope can also find the answer.

the first problem I see is the pin19 of he hdmi interface.

if you look at this schematics as reference where there are hdmi input and output:

https://reference.digilentinc.com/_media/reference/programmable-logic/arty-z7/arty_z7_sch.pdf?_ga=2.123670219.1364212687.1588794691-946234336.1588794691

you see the only difference between both ports is how the pin 19 behaves.

but looking at the microhdmi and hdmi pinout the problems is:

https://pinoutguide.com/PortableDevices/micro_hdmi_type_d_pinout.shtml

https://pinouts.ru/Video/hdmi_pinout.shtml

they have the same signals but different pins number for the signals and didn't found how the wiring between both connectors is done in cable.

sorry but still not sure about, maybe if yo make your own cable...

also you have to try if you can switch the direction ports in FPGA(didn't try).

Hi,

Many thanks for the detailed research - very useful pointers. I think the direction of the pin on the FPGA is not a problem. I wouldn’t mind making a modified cable, though this won’t be optimal for signal quality, I guess. But for a short cable it’s mostly likely fine. It would be nice if someone on the forum who understands HDMI cabling well could comment!

Niko

best idea could be to find how the wiring cable it's done in typical micro hdmi to hdmi cable before start to solder so small connector...it has to manage high throughput so not sure about make a new cable.

Also I don't know any device that has a micro hdmi as video input connector, all I know are for video output.

I'm also interested in this, let me know what you find. Some things I can think of:

  • You have to pull 10 bits from the line in a single pixel clock, so there might be some dynamic 10x multiplier PLL needed
  • It's also probably not possible to get resolutions beyond 720p, since this FPGA is binned in the lowest speed grade
  • A dummy E-DID might be needed so that the HDMI source can read it over I2C DDC and pick a suitable video format