I've got a couple of questions re. thermal layout considerations for the TPIC6B595.
Given it has to sink a fair amount of current for a small package the datasheet recommends increasing copper coverage, 'plugging' all thermal via's and ensuring 'solder coverage should be at least 85%.'
I don't know what this means, if I have those copper pads as shown with a stack of via's do I then have to coat it all with solder and plug all the via's with solder ?
From the TPIC6B595 data sheet - http://www.ti.com/lit/ds/slis032b/slis032b.pdf
11.1 Layout Guidelines
There is no special layout requirement for the digital signal pin; the only requirement is placing the ceramic
bypass capacitors near the corresponding pin. Because the TPIC6B595 device does not have a thermal
shutdown protection function, to prevent thermal damage, TJ must be less than 150°C. If the total sink current is high, the power dissipation might be large. The devices are currently not available in the thermal pad package, so good PCB design can optimize heat transfer, which is absolutely essential for the long-term reliability of the device. Maximize the copper coverage on the PCB to increase the thermal conductivity of the board, because the major heat-flow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely important when the design does not include heat sinks attached to the PCB on the other side of the package.
• Add as many thermal vias as possible directly under the package ground pad to optimize the thermal
conductivity of the board.
• All thermal vias should be either plated shut or plugged and capped on both sides of the board to prevent
solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.
