Help with peak detector circuit...

Hi guys

So i was looking for a peak detector circuit and found this circuit. Even though I did some research about it and some others peak detector circuit I didn't found nothing that would explain how this really works. I was hoping if someone could help me understand it...pleasee :slight_smile:

This particular design uses comparators instead of op-amps. The principal is the same, but the output is pulled-up bu the 10K & 4.7K resistors, instead of an internal transistor. This is slightly "safer" because the capacitor charging-current is limited by the resistors. With an op-amp, you can get excessive current through the output stage when the output switches and the capacitor suddenly starts charging. The downside is that the capacitors charge more slowly and you might not "detect" some short-term peaks.

Note that the feedback to the **-**input (pin-2) is connected to the diode's cathode. The voltage here is your reference voltage and it's also the (unbuffered) peak-detector output output.

The 2nd amplifier stage is a buffer amplifier. It has a gain of one, so whatever voltage is on pin-5 also appears at pin-7. The buffer amplifier has high input impedance. The purpose of the buffer stage is to "isolate" the capacitor at pin-2 so that it discharges into the 100K resistor ONLY and the discharge time is unaffected by the load (whatever is connected to pin-7).

With that background... Here's how it works -
Starting with an output of zero, let's say you apply 1V to the input (pin-3). The positive voltage on pin-3 is greater than the zero-voltage on your reference, so the op-amp's output (pin-1) swings positive. The voltage rises until the voltage on the other side of the diode (the output & reference voltage) hits 1V. The output/reference won't go above 1V because if the - input is greater than the + input, the op-amp's output swings negative.

Now when the input drops below 1V (or goes negative), the op-amp's output (pin-1) swings negative, but no current flows through the diode. The capacitor at pin-2 holds the peak-detector's output-voltage (the input to the buffer stage) and it "slowly" discharges into the 100K resistor.

At 0.1uF and 100k, you have an RC time constant of 1/100th of a second. That's "slow" for electronics, but it's a little fast for humans & digital voltmeters. For audio peak-detection (to control lighting effects) I use a larger resistor (maybe 1M or 10M) so the capacitor discharges more slowly and the voltage is "held" longer.

Some peak detector circults leave out the resistor that's in parallel with the holding-capacitor and replace it with a switch. In that case, the peak is held indefinitely until it's shorted-out with the switch (or until the capacitor self-discharges).

Even though I did some research about it and some others peak detector circuit I didn't found nothing that would explain how this really works.

If you know how op-amps and comparators work, and you understand inverting & non-inverting amplifiers, and buffers work, you should be able to figure-out what this circuit is doing,

Thank you very much for your answer and time. I have a better understanding now.

So if the signal detector wire were disconnected this would be a simple comparator right?