Hey everyone!
I am using Arduino Mega 2560 and would like to detect signals in nanoseconds scale. This means that the ADC I need has to have at least 500 MSPS.
My question is if there is an suitable ADC that meet the requirements, is the 16 MHz clock Mega able to cope with that speed? Also, what kind of external ADC is suitable to use with Arduino Mega?
Is there any other way if a hi-speed ADC would not work?
Thanks.
A 500 million samples a second?
On a 16 MHz processor?
For how long?
Have you got a FIFO?
@AWOL
Yes I need to detect the time of flight between a RF transmitter and receiver. The ADC will probably read for a couple of seconds. And I'm sorry, I don't know much about FIFO. Do you have any recommendations? Thanks!
You don't see a problem with coupling a 16 million instructions (at most) processor to a 500 million sample a second converter?
Thanks for pointing out.
I am wondering that can I add any additional hardware that helps in this case? Please help, thanks.
Well, there's the FIFO I mentioned, but a gigasample FIFO is pretty big
What you are asking for is the guts of a DSO (digital storage oscilloscope). Look at USB oscilloscopes?
Yes I need to detect the time of flight between a RF transmitter and receiver.
With the speed of light, and RF, at 299792458 metres per second (≈3.00×108 m/s),
how far apart do you think the Tx and Rx units need to be to measure anything meaningful?
Your requirements are pretty close to what a DSO's requirements are. You are never going to be able to use that 500MSPS converter in real time, you have to trigger it somehow and then look at the data afterwards. So you need something like this: Trigger circuit, ADC into a buffer circuit, and analysis section. And the analysis could conceivably be done with a 16Mhz processor, though you might want to go faster since there are now 50Mhz ARM processors that cost no more than the ATMega328P and 2MB Flash 300Mhz ARM controllers that cost not a ton (e.g. http://www.atmel.com/devices/ATSAMS70Q21.aspx). But anyway, how would you do this? The only real tool available to you is a PLD (CPLD/FPGA). You have a clock to it and the 8 lanes of the ADC, on each clock cycle after the trigger pulse you read the ADC lines, increment an address line, and shoot the data into a RAM. You have a line on the PLD to notify the processor that the sample is ready and then the processor can read it all back at its speed. The issue is that no PLDs to the best of my knowledge can do this at 500Mhz and no memory is that fast either (though you could certainly use banks of more than one memory IC for each PLD). So I think the solution is to use a high speed counter and maybe 4 PLDs running at 125Mhz and in turn they read the ADC and spread that sample out into 4 banks of memory, one attached to each PLD. But the devil is in the details, any circuit at this speed needs to be on a PCB and needs to be designed well. I would look at schematics and gerbers for TI's reference boards for their 500msps ADC to try to figure out how to do this. This is not a beginner project.
What ADC are you thinking of using? ADC08500 data sheet, product information and support | TI.com ??
If by "detect signals in nanoseconds scale" you are talking about pulses or something like that instead of a complex analog signal that you want to digitize, none of this really applies. It gets simpler. You probably want something discrete or with a small CPLD where you run a very high speed counter on a good clock and stop the counter with the trigger circuit or something like that and let the controller read the count back. For speeds like 2ns resolution you may have to use ECL. I don't think PLDs can be made fast enough and even the fastest CMOS counters are more like 200Mhz or so.
I need to detect the time of flight between a RF transmitter and receiver.
FYI, just for the record. RF doesn't fly. It is electromagnetic waves. What you want to measure is technically called "propagation time "
Radio Propagation
You don't see anything wrong about asking us if you can measure 500,000,000 samples per second with a 16 Mhz uC ?
Really ? How do imagine that could work ? I hope you have a big budget.
TI provides app notes and reference designs to most of their ICs. I found this, this is a design you can go ahead and create for their 500MSPS ADC. They have one FPGA using it's internal memory for a record length max of 4K. I guess one FPGA can be fast enough then. It uses a Cypress microcontroller for USB connectivity but I don't think microcontroller choice matters, you could use a 2560 just fine.
These guys used a lower end FPGA with an external memory, still one FPGA. A fairly cheap one too. It's just a Dave-like analysis of some commercial product that they tore down, they don't know all the details, but this is another design you can learn from.
http://www.bunniestudios.com/blog/?p=1264
http://www.bunniestudios.com/blog/?p=1316
It looks like this is all possible using possibly even 2 layers boards and fairly uncomplex FPGAs. TI gives you a lot of insight on what sort of analog circuitry you need up front in their reference design so you might not have to work that all out for yourself. But it is not a simple project.