It can take nearly 100ms to produce a result, this probably isn't a problem if the load cell is being used to measure a static load (i.e. set of weighing scales), but I'm using it to measure the torque in a drive shaft in a pedal powered vehicle so the torque/load is varying continuously. Will this effect the reading? Does the ADC take a 'snapshot' of the voltage at the start of the process? Or will the changing voltage lead to inaccurate results?
Many ADCs have a "sample and hold" circuit on the front end that captures the (time varying) analog voltage and holds it constant during the analog to digital conversion process. The data sheet for such an ADC will specify the sample window time for the device. The HX711 apparently does not have a sample and hold, hence it is probably not a suitable choice for a dynamic application.
So an ADC without a 'sample and hold' circuit will return a value equal to the average voltage over the period the processing took? Or will it just return complete nonsense?
Well a mixture of both, but it depends on the A/D conversion method the chip uses.
Flash conversion - mainly instantaneous
Successive approximation - as the sample is evaluated from the most significant bit to the least then it will depend when the disturbance occurs as to how messed up are the smaller bits.
Dual ramp - during the integration phase yes it will average, during the discharge phase it will not matter if the input changes at all.
The HX711 is a sigma-delta converter. This type of converter averages the input during the conversion process. It is used here because it is very good in noisy environments.
The device will output conversions at two rates 10Hz and 80Hz. I suspect the conversion times are slightly less but it is not specified.
I guess you are using at 10 Samples per Second from the information given.
I assume that the variable sample rate give me the choice of 10 sps that are slow but accurate, or 80 sps that a are fast but not-so-accurate.
Because I know the input values are continuously variable, I guess I would be better off with taking lots of high speed samples and then averaging them up?
Both conversion rates are very slow compared to the sampling type of conversions. The conversion actually integrates (averages) the signal over the conversion time.
So for the 10 Hz rate (we will forget about the communication time in between conversions here) the input is averaged over 100 ms. Because the averaging is essentially analog it excels in noise cancellation. This is why they can make a claim for a 24 bit conversion. see (1)
So if you are planning on taking multiple samples and averaging them you would be better with the slower rate as it has 8X the time to average compared to the higher rate.
Let me know if this makes sense to you.
(1) 24 bits at a gain of 128 means each bit is 0.6µV not an easy task.
The ADC on the ATmega chips samples for either half (or one?) clock period of the analog clock, which
is typically running at 125kHz. So it samples for 4us, then holds the voltage on an internal capacitor
during conversion.
Since the capacitor holds charge from last time, you have to ensure that a voltage source driving
an analog pin has a low enough impedance to fully charge the capacitor to the new sample voltage
in that short time period (within 10 bit accuracy, ie 0.05%). This is why 10k or lower source impedance
is recommended.