how does an ADC cope with a varying analogue voltage?

Well a mixture of both, but it depends on the A/D conversion method the chip uses.

  1. Flash conversion - mainly instantaneous

  2. Successive approximation - as the sample is evaluated from the most significant bit to the least then it will depend when the disturbance occurs as to how messed up are the smaller bits.

  3. Dual ramp - during the integration phase yes it will average, during the discharge phase it will not matter if the input changes at all.